CAREER: Design and Synthesis of Energy-efficient Time-domain Computing for Intelligent Edge Processing
CAREER: Design and Synthesis of Energy-efficient Time-domain Computing for Intelligent Edge Processing
批准号:
1846424
负责人:
Jie Gu
金额:
$100.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2019
资助国家:
美国
项目状态:
未结题
起止时间:
2019-05-01 至 2025-04-30
中文摘要
点击翻译按钮获取中文摘要
英文摘要
The rapid growth in Internet-of-Things (IoT) and Artificial Intelligence (AI) is creating a huge demand for intelligent electronic devices with very low cost and high energy efficiency. Conventional digital technology is faced with computing bottleneck due to the difficulty of further technology scaling. As a result, new computing methods are urgently needed to meet the demand from the machine learning empowered applications. This project explores a non-conventional time-domain computing technique with promise of bringing fundamental improvement to the energy efficiency of computing. The project can potentially bring significant advancement to the IoT/AI developments by enabling expensive machine learning operations in small IoT devices or sensor nodes. This project will also create significant outreach activities to the society by disseminating the study of energy efficient edge processing to K-12 students and underrepresented groups through a combination of workshops and training programs. New course materials and hand-on experiments will be introduced to undergraduate and graduate students to promote a cross-layer learning strategy from algorithm to hardware design for computer engineering. This project aims at developing a systematic design approach for the emerging time-domain computing which utilizes time for information processing. The proposed developments cover a range of techniques including circuit design, electronic design automation, implementation of machine learning algorithms and integration for near-sensor computing. Specifically, the project will be dedicated to: (1) developing a thorough design principles of the time-domain computing, (2) developing a design automation methodology that is compatible with modern commercial tools and capable of large-scale implementation of the techniques, (3) exploring its strong benefits in machine learning and other popular computing algorithms, and (4) performing system integration with sensor nodes for intelligent edge processing devices. The project will deliver a highly automated systematic design methodology enabling large-scale integration and enhanced energy-efficiency for new time-domain computing techniques.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(6)
专著(0)
科研奖励(0)
会议论文
登录
查看更多内容
A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip Training for Low Power Edge Devices
混合信号时域生成对抗网络加速器,具有高效的亚阈值时间乘数和低功耗边缘设备的混合信号片上训练
DOI:
10.1109/vlsicircuits18222.2020.9162829
发表时间:
2020
期刊:
Symposium on VLSI Circuits
影响因子:
--
作者:
[Chen, Zhengyu, Fu, Sihua, Cao, Qiankai, Gu, Jie]
通讯作者:
Gu, Jie
DOI:
10.1145/3316781.3317800
发表时间:
2019-06
期刊:
2019 56th ACM/IEEE Design Automation Conference (DAC)
影响因子:
--
作者:
[Zhengyu Chen;H. Zhou;Jie Gu]
通讯作者:
Zhengyu Chen;H. Zhou;Jie Gu
A Sparse Convolution Neural Network Accelerator for 3D/4D Point-Cloud Image Recognition on Low Power Mobile Device with Hopping-Index Rule Book for Efficient Coordinate Management
用于低功耗移动设备上的 3D/4D 点云图像识别的稀疏卷积神经网络加速器,具有用于高效坐标管理的跳跃索引规则手册
DOI:
10.1109/vlsitechnologyandcir46769.2022.9830178
发表时间:
2022
期刊:
Symposium on VLSI Technology and Circuits
影响因子:
--
作者:
[Cao, Qiankai, Gu, Jie]
通讯作者:
Gu, Jie
DOI:
10.1109/jssc.2020.3021066
发表时间:
2021-02-01
期刊:
IEEE JOURNAL OF SOLID-STATE CIRCUITS
影响因子:
5.4
作者:
[Chen, Zhengyu, Gu, Jie]
通讯作者:
Gu, Jie
Collaborative Research: CMOS+X: A Device-to-Architecture Co-development and Demonstration of Large-scale Integration of FeFET on CMOS for Emerging Computing Applications
-
批准号:2318807
-
项目类别:Standard Grant
-
资助金额:$38.5万
-
财政年份:2023
-
负责人:Jie Gu
-
依托单位:
SHF: Small: A Chip of Happiness: Device-to-System Developments of Affective Computing for Human-in-the-loop Computer System
-
批准号:2208573
-
项目类别:Standard Grant
-
资助金额:$60.0万
-
财政年份:2022
-
负责人:Jie Gu
-
依托单位:
SHF: Small: Development of Differentiable Memory Augmented Neural CPU Architecture for Cognitive Computing
-
批准号:2008906
-
项目类别:Standard Grant
-
资助金额:$50.0万
-
财政年份:2020
-
负责人:Jie Gu
-
依托单位:
CSR: Small: Development of Distributed Neural Processing Electronics for Whole-Body Computing and Biomedical Sensor Fusion
-
批准号:1816870
-
项目类别:Standard Grant
-
资助金额:$50.0万
-
财政年份:2018
-
负责人:Jie Gu
-
依托单位:
SHF: Small: Greybox Computing: An Associative Computing Methodology with Instruction Directed Power and Clock Management
-
批准号:1618065
-
项目类别:Standard Grant
-
资助金额:$45.0万
-
财政年份:2016
-
负责人:Jie Gu
-
依托单位:
XPS: FULL: FP: Design and Synthesis of New Energy-efficient Self-healing Computing Electronics with Real-time Configurability
-
批准号:1533656
-
项目类别:Standard Grant
-
资助金额:$54.86万
-
财政年份:2015
-
负责人:Jie Gu
-
依托单位:
国内基金
海外基金
Applications of AI in Market Design
-
批准号:--
-
项目类别:外国青年学者研 究基金项目
-
资助金额:--
-
批准年份:2024
-
负责人:Manshu Khanna
-
依托单位:
基于“Design-Build-Test”循环策略的新型紫色杆菌素组合生物合成研究
-
批准号:
-
项目类别:省市级项目
-
资助金额:--
-
批准年份:2021
-
负责人:
-
依托单位:
在噪声和约束条件下的unitary design的理论研究
-
批准号:12147123
-
项目类别:专项基金项目
-
资助金额:18万元
-
批准年份:2021
-
负责人:顾炎武
-
依托单位: