Low-cost route for the definition of IDE (interdigitated electrode) structures with nanometric geometries over large areas

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This project aims at providing a low-cost route for the preparation of metallic IDE (interdigitated electrode) structures with geometries of the electrodes in the sub-micrometre- and nanometre-range, with active areas covered by these electrodes in the millimetre range and the connection of the electrodes via contact areas in the 100-micrometre range. Though these goals are ambitious, the preparation is to be as simple and as cost-efficient as possible. Spin-coating, nanoimprint, optical lithography and sputtering will be the techniques of choice, and not electron beam writing or dry etching which require costly high-vacuum equipment. A hybrid technique is applied to further simplify the procedure. nanoimprint lithography (for the definition of the interdigitated electrodes over large areas) will be combined with optical lithography in a simple contact printer (for the definition of the contact areas) within one single photoresist layer; both techniques being suitable for parallel, large area pattern definition. The imprint procedure will be conducted in such a way that no residual layer remains, making any dry etch step for the removal of such a layer redundant. Directly after hybrid lithography and development the metallic structures will be prepared by sputtering and lift-off. In order to further foster the low-cost route only items that are easily accessible will be used; conventional stamps (Si, polymeric replica stamps), conventional photomasks (Cr on quartz, no phase shifting structures), conventional photoresists (negative tone and positive tone) as well as polymeric substrates.Metallic IDE structures are the key components for a number of devices that benefit from nanometric electrodes over large areas; these range from simple (capacitive or resistive) sensors (e.g. for environmental applications) to low-cost tunable, organic DFB (distributed feedback) laser devices (e.g. for biomarker recognition in lab-on-chip applications). A low cost preparation route renders such devices interesting for disposable, miniaturised analysis systems, in particular when plastic substrates are used.