CAREER: Advancing On-chip Network Architecture for GPUs

职业：推进 GPU 片上网络架构

• 批准号: 1750047
• 负责人: Lizhong Chen
• 金额: $ 45万
• 依托单位: Oregon State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2018
• 资助国家: 美国
• 起止时间: 2018-02-01 至 2024-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1750047&HistoricalAwards=false
• 关键词: CAREER; Advancing; chip; Network; Architecture

Graphics Processing Units (GPUs) have been playing critical roles in numerous disciplines and sectors, as well as many emerging fields that might not otherwise be possible. Examples include autonomous driving, virtual reality, medical imaging, and parallel computing in HPC systems and data-centers. This success should be largely credited to the massively parallel computing capability of GPU architectures, which can integrate thousands of processing cores on a single chip. To continue meeting growing performance expectations and energy-efficiency, a key challenge over the next decade and beyond is how to support on-chip communications among the vast number of processing cores and provide fast and efficient data transfer to feed concurrent computations.This project establishes an integrated research and education program to investigate cross-cutting approaches and techniques to advance and improve the effectiveness of on-chip networks (NoCs) in GPU systems, as well as to create academic course materials and outreach activities for the education and broad dissemination of the proposed subjects. The research component has three main thrusts: 1) increasing fundamental understanding of GPU NoCs by investigating, among many other open problems, the criticality, scalability and sensitivity of NoCs to GPU architecture; 2) designing and implementing cost-effective router-based and routerless GPU NoCs, and 3) co-optimizing NoC design with other GPU subsystems such as cache and warp scheduling. The education and outreach components include developing automated tools to increase the effectiveness of simulation-based course projects and engage students from diverse backgrounds, strengthening architecture course offerings, organizing interdisciplinary seminar courses, and leading various outreach activities on K-12 education, women and underrepresented groups.

图形处理单元（gpu）在许多学科和部门以及许多新兴领域中发挥着至关重要的作用，否则这些领域可能无法实现。例子包括自动驾驶、虚拟现实、医疗成像以及高性能计算系统和数据中心中的并行计算。这一成功在很大程度上归功于GPU架构的大规模并行计算能力，它可以在单个芯片上集成数千个处理核心。为了继续满足不断增长的性能期望和能源效率，未来十年乃至更长时间的一个关键挑战是如何支持大量处理核心之间的片上通信，并提供快速高效的数据传输以满足并发计算。该项目建立了一个综合研究和教育计划，以调查跨领域的方法和技术，以推进和提高GPU系统中片上网络（noc）的有效性，并为拟议主题的教育和广泛传播创建学术课程材料和推广活动。研究部分有三个主要重点：1)通过研究GPU noc对GPU架构的重要性、可扩展性和敏感性等许多其他开放问题，增加对GPU noc的基本理解；2)设计和实现具有成本效益的基于路由器和无路由器的GPU NoC； 3)与其他GPU子系统（如缓存和warp调度）共同优化NoC设计。教育和外展部分包括开发自动化工具，以提高基于模拟的课程项目的有效性，并吸引来自不同背景的学生，加强建筑课程的设置，组织跨学科研讨会课程，并领导有关K-12教育，妇女和代表性不足群体的各种外展活动。

项目成果

Express Link Placement for NoC-Based Many-Core Platforms

• DOI: 10.1145/3337821.3337877
• 发表时间: 2019-08
• 期刊: Proceedings of the 48th International Conference on Parallel Processing
• 作者: Yunfan Li;Di Zhu;Lizhong Chen

Polymorphic Accelerators for Deep Neural Networks

• DOI: 10.1109/tc.2020.3048624
• 发表时间: 2022-03
• 期刊: IEEE Transactions on Computers
• 影响因子: 3.7
• 作者: Arash AziziMazreah;Lizhong Chen

UVMBench: A Comprehensive Benchmark Suite for Researching Unified Virtual Memory in GPUs

• 发表时间: 2020-07
• 期刊: ArXiv
• 作者: Yongbin Gu;Wenxuan Wu;Yunfan Li;Lizhong Chen

Edge-Based Heuristics for Optimizing Shortcut-Augmented Topologies for HPC Interconnects

用于优化 HPC 互连的快捷增强拓扑的基于边缘的启发式方法

• DOI: 10.3390/electronics11172778
• 发表时间: 2022
• 期刊: Electronics
• 影响因子: 2.9
• 作者: Fuad, Kazi Ahmed;Zeng, Kai;Chen, Lizhong
• 通讯作者: Chen, Lizhong

Characterizing On-Chip Traffic Patterns in General-Purpose GPUs: A Deep Learning Approach

表征通用 GPU 中的片上流量模式：深度学习方法

• DOI: 10.1109/iccd46524.2019.00016
• 发表时间: 2019
• 期刊: IEEE 37th International Conference on Computer Design (ICCD
• 作者: Li, Yunfan;Penney, Drew;Ramamurthy, Abhishek;Chen, Lizhong
• 通讯作者: Chen, Lizhong