Phase I IUCRC Northeastern University: Center for Hardware and Embedded System Security and Trust (CHEST)
第一阶段IUCRC东北大学:硬件和嵌入式系统安全与信任中心(CHEST)
基本信息
- 批准号:1916762
- 负责人:
- 金额:$ 75万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:2019
- 资助国家:美国
- 起止时间:2019-09-15 至 2025-08-31
- 项目状态:未结题
- 来源:
- 关键词:
项目摘要
The Center for Hardware and Embedded Systems Security and Trust (CHEST) coordinates university-based research with needs of industry and government partners to advance knowledge of security, assurance, and trust for electronic hardware and embedded systems. Interests of CHEST include identification, detection, monitoring, mitigation, and elimination of vulnerabilities that affect hardware and embedded systems. The CHEST Center addresses a range of attack vectors across design, operation, manufacturing, supply chains, and integration of the hardware, software, and firmware to a variety of systems. The Center is inventing and disseminating technologies, practices, and guidelines to stakeholders and educating a next generation of experts.The NSF CHEST Center addresses security, assurance, and trust across several levels: Large-scale systems, embedded systems, design and operations, requirements, standards, manufacturing, supply chains, and integrated circuits and boards. Among the universities, the Northeastern University (NU) leads CHEST efforts for designing, mitigating, and protecting hardware and embedded systems against malicious attacks at the levels of architecture and embedded devices. Topics include: (i) clean-slate secure architecture to balance performance and information security on CPUs and accelerators; (ii) lightweight hardware primitives for security at the edge of Internet-of-Things; and (iii) hardening techniques for deep learning systems on edge computing under adversarial attacks.Security, assurance, and trust of integrated cyber-physical systems enable meeting fundamental human needs, along with supporting broader social, environmental, and economic progress of the nation. The ability of systems to absorb disruptive shocks and recover with minimal loss is key to protecting human lives and property. The NSF CHEST Center influences the practices of industry, government, and the military in design, protection, and resilience to vulnerabilities associated with hardware and embedded systems. Improving assurance and trust contributes to the reducing the frequencies and severities of adverse events with attention to system missions, performance, schedule, and cost.The NSF CHEST Center website, www.nsfchest.org, is the repository for all publicly accessible data, code, results, etc. These pages will be maintained for at least as long as the CHEST Center is active. In addition, all CHEST projects that are led by NU are permanently archived in digital format on the NU file servers with sufficient provisions for backup and recovery in case of equipment failure. All archival NU computers and servers are backed up on a regular basis.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
硬件和嵌入式系统安全与信任中心(CHEST)协调基于大学的研究与行业和政府合作伙伴的需求,以提高电子硬件和嵌入式系统的安全,保证和信任知识。CHEST的兴趣包括识别、检测、监控、缓解和消除影响硬件和嵌入式系统的漏洞。CHEST中心针对设计、运营、制造、供应链以及硬件、软件和固件与各种系统的集成中的一系列攻击媒介。该中心致力于为利益相关者发明和传播技术、实践和指导方针,并培养下一代专家。NSF CHEST中心致力于解决多个层面的安全、保证和信任问题:大型系统、嵌入式系统、设计和运营、要求、标准、制造、供应链以及集成电路和电路板。在这些大学中,东北大学(NU)领导了CHEST在架构和嵌入式设备层面设计、缓解和保护硬件和嵌入式系统免受恶意攻击的工作。主题包括:(i)干净的安全架构,以平衡CPU和加速器的性能和信息安全;(ii)轻量级硬件原语,用于物联网边缘的安全性;以及(iii)强化对抗攻击下边缘计算上深度学习系统的技术。集成网络物理系统的安全性,保证和信任能够满足人类的基本需求,沿着支持更广泛的社会,环境,国家的经济发展。系统吸收破坏性冲击并以最小损失恢复的能力是保护人类生命和财产的关键。NSF CHEST中心影响着工业、政府和军方在设计、保护和恢复与硬件和嵌入式系统相关的漏洞方面的实践。提高保证和信任有助于降低不良事件的频率和严重程度,同时注意系统任务、性能、进度和成本。NSF CHEST中心网站www.nsfchest.org是所有可公开访问的数据、代码、结果等的存储库。这些页面将至少在CHEST中心处于活动状态时进行维护。此外,由NU领导的所有CHEST项目都以数字格式永久存档在NU文件服务器上,并有足够的备份和恢复准备,以防设备故障。该奖项反映了NSF的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(9)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Large Delay Analog Trojans: A Silent Fabrication-Time Attack Exploiting Analog Modalities
大延迟模拟木马:利用模拟模式的无声制造时间攻击
- DOI:10.1109/tvlsi.2020.3034878
- 发表时间:2021
- 期刊:
- 影响因子:0
- 作者:Yang, Tiancheng;Mittal, Ankit;Fei, Yunsi;Shrivastava, Aatmesh
- 通讯作者:Shrivastava, Aatmesh
RISC-V Microarchitecture Simulation State Enumeration
RISC-V 微架构仿真状态枚举
- DOI:
- 发表时间:2021
- 期刊:
- 影响因子:0
- 作者:Griffin Knipe, Derek Rodriguez
- 通讯作者:Griffin Knipe, Derek Rodriguez
A Cross-Platform Cache Timing Attack Framework via Deep Learning
基于深度学习的跨平台缓存定时攻击框架
- DOI:10.23919/date54114.2022.9774612
- 发表时间:2022
- 期刊:
- 影响因子:0
- 作者:Ding, Ruyi;Zhang, Ziyue;Zhang, Xiang;Gongye, Cheng;Fei, Yunsi;Ding, Aidong A.
- 通讯作者:Ding, Aidong A.
Secure Speculative Execution via RISC-V Open Hardware Design
通过 RISC-V 开放硬件设计实现安全推测执行
- DOI:
- 发表时间:2021
- 期刊:
- 影响因子:0
- 作者:Majid Sabbagh, Yunsi Fei
- 通讯作者:Majid Sabbagh, Yunsi Fei
Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs
- DOI:10.1109/seed55351.2022.00013
- 发表时间:2022-09
- 期刊:
- 影响因子:0
- 作者:Kaustubh Shivdikar;Gilbert Jonatan;Evelio Mora;Neal Livesay;R. Agrawal;Ajay Joshi;José L. Abellán;John Kim;D. Kaeli
- 通讯作者:Kaustubh Shivdikar;Gilbert Jonatan;Evelio Mora;Neal Livesay;R. Agrawal;Ajay Joshi;José L. Abellán;John Kim;D. Kaeli
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Yunsi Fei其他文献
Orchestrating Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency
编排程序的水平并行性和垂直指令打包,以提高系统整体效率
- DOI:
10.1109/tc.2009.41 - 发表时间:
2009 - 期刊:
- 影响因子:3.7
- 作者:
Hai Lin;Yunsi Fei - 通讯作者:
Yunsi Fei
Towards secure cryptographic software implementation against side-channel power analysis attacks
针对侧信道功率分析攻击的安全加密软件实施
- DOI:
10.1109/asap.2015.7245722 - 发表时间:
2015 - 期刊:
- 影响因子:0
- 作者:
Pei Luo;Liwei Zhang;Yunsi Fei;A. Ding - 通讯作者:
A. Ding
DeepStrike: Remotely-Guided Fault Injection Attacks on DNN Accelerator in Cloud-FPGA
DeepStrike:对 Cloud-FPGA 中的 DNN 加速器进行远程引导故障注入攻击
- DOI:
10.1109/dac18074.2021.9586262 - 发表时间:
2021 - 期刊:
- 影响因子:0
- 作者:
Yukui Luo;Cheng Gongye;Yunsi Fei;Xiaolin Xu - 通讯作者:
Xiaolin Xu
A novel multi-objective instruction synthesis flow for application-specific instruction set processors
用于特定应用指令集处理器的新颖的多目标指令合成流程
- DOI:
10.1145/1785481.1785576 - 发表时间:
2010 - 期刊:
- 影响因子:0
- 作者:
Hai Lin;Yunsi Fei - 通讯作者:
Yunsi Fei
Register file partitioning and recompilation for register file power reduction
寄存器文件分区和重新编译以降低寄存器文件功耗
- DOI:
10.1145/1754405.1754409 - 发表时间:
2010 - 期刊:
- 影响因子:0
- 作者:
Xuan Guan;Yunsi Fei - 通讯作者:
Yunsi Fei
Yunsi Fei的其他文献
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{{ truncateString('Yunsi Fei', 18)}}的其他基金
EAGER: Side Channels Go Deep - Leveraging Deep Learning for Side-channel Analysis and Protection
EAGER:侧信道深入——利用深度学习进行侧信道分析和保护
- 批准号:
2212010 - 财政年份:2022
- 资助金额:
$ 75万 - 项目类别:
Standard Grant
SaTC: CORE: Medium: Protecting Confidentiality and Integrity of Deep Neural Networks against Side-Channel and Fault Attacks
SaTC:核心:中:保护深度神经网络的机密性和完整性免受侧通道和故障攻击
- 批准号:
1929300 - 财政年份:2019
- 资助金额:
$ 75万 - 项目类别:
Standard Grant
Planning IUCRC Northeastern University: Center for Hardware and Embedded System Security and Trust (CHEST)
规划 IUCCRC 东北大学:硬件和嵌入式系统安全与信任中心 (CHEST)
- 批准号:
1747748 - 财政年份:2018
- 资助金额:
$ 75万 - 项目类别:
Standard Grant
TWC: Medium: Automating Countermeasures and Security Evaluation Against Software Side-channel Attacks
TWC:中:针对软件旁路攻击的自动化对策和安全评估
- 批准号:
1563697 - 财政年份:2016
- 资助金额:
$ 75万 - 项目类别:
Continuing Grant
TWC: Medium: Collaborative: A Unified Statistics-Based Framework for Side-Channel Attack Analysis and Security Evaluation of Cryptosystems
TWC:媒介:协作:基于统计的统一框架,用于密码系统的侧通道攻击分析和安全评估
- 批准号:
1314655 - 财政年份:2013
- 资助金额:
$ 75万 - 项目类别:
Standard Grant
MRI: Development of a Testbed for Side Channel Analysis and Security Evaluation (TeSCASE)
MRI:开发侧通道分析和安全评估测试台 (TeSCASE)
- 批准号:
1337854 - 财政年份:2013
- 资助金额:
$ 75万 - 项目类别:
Standard Grant
A Multi-level/multi-faceted Framework for Energy-efficient Application-Specific Instruction Set Processor Synthesis
节能型专用指令集处理器综合的多层次/多方面框架
- 批准号:
0541102 - 财政年份:2006
- 资助金额:
$ 75万 - 项目类别:
Continuing Grant
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