SHF: EAGER: Toward Energy-Efficient Heterogeneous Computing Integrating Polymorphic Magnetic and CMOS Devices

非传统材料和器件与硅互补金属氧化物半导体(CMOS)技术的集成可以实现一种新型的计算平台，具有与面积、能效和弹性相关的潜在优势。在这方面，在磁性设备中存储和处理信息是很有前途的。这是因为，与cmos器件不同，磁性器件中的信息可以在没有任何能量消耗的情况下存储，而能量只需要读或写信息。磁性设备的这种低功耗操作对于物联网和智能传感等对操作功率要求较低的应用非常有利。这项研究将把这种磁性设备的物理原理与它们在电路中的使用联系起来，在电路中，磁性设备与硅设备共存并相互补充，以增强功能和用户体验。这项研究的结果将被纳入纽约大学(NYU)每年举办的动手电路设计研讨会。具体来说，学生将在桌面实验和交互式在线学习工具中学习磁铁的物理知识。该项目还将开发有关磁记忆的内容，这些内容将在纽约大学每年教授的关于纳米电子器件和电路的课程中介绍。该项目还将通过普渡大学的科学和工程门户(称为NanHUB)公开发布研究中产生的装置模型和模拟数据，以帮助相关领域的研究人员和教育工作者。尽管存在其他可能性，但这个特殊的项目将专注于两个特定的磁性装置，即电压控制拓扑自旋开关(VTOPSS)和磁电自旋轨道(MESO)装置。这些磁性设备为二进制操作提供了比其磁性对应设备高出10到100倍的能效。这些器件的另一个独特功能是，它们的逻辑功能可以在制造后配置，这转化为电路和系统级别的弹性和面积和功率效益。将建立vTOPSS和MESO器件的延迟、能量耗散、热稳定性和错误率的基于物理的模型，并根据大规模的蒙特卡罗模拟进行校准。潜在的互连，包括金属和半导体纳米线，对设备性能的影响将被量化。器件级模型将用于开发以vTOPSS和MESO为开关元件的布尔逻辑门的标准单元库。该单元库将使磁-CMOS计算平台的性能指标能够在规模上量化。这项研究中采用的从物理到电路的方法将推动电路设计中的创新概念，使拟议技术的竞争力最大化。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The integration of non-conventional materials and devices with silicon Complementary Metal Oxide Semiconductor (CMOS) technology can enable a new type of computing platform with potential benefits related to area, energy efficiency, and resiliency. In this regard, storing and manipulating information in magnetic devices is promising. This is because, unlike CMOS devices, information in magnetic devices can be stored without any energy dissipation, while energy is needed only to read or write information. This low-power operation of magnetic devices is highly advantageous for applications such as Internet of Things and intelligent sensing that have low operating power requirements. This research will connect the physics of such magnetic devices with their use in circuits in which magnetic devices co-exist with and complement silicon devices for enhanced functionality and user experience. Results from this research will be incorporated into a hands-on circuit design workshop organized annually at New York University (NYU). Specifically, students will learn about the physics of magnets in table top experiments and interactive online learning tools. The project will also develop content on magnetic memory that will be introduced in a course on nanoelectronics devices and circuits taught annually at NYU. The project will also publicly release the device models and simulation data generated in this research via the science and engineering gateway hosted at Purdue University, known as the nanoHUB, to benefit researchers and educators working in related fields.While other possibilities exist, this particular project will focus on two specific magnetic devices, namely the voltage-controlled topological-spin switch (vTOPSS) and the magneto-electric spin-orbit (MESO) device. These magnetic devices offer 10 to 100 times superior energy efficiency for binary operations compared to their magnetic counterparts. Another unique feature of these devices is that their logic functionality can be configured post-fabrication, which translates into resilience and area- and power benefits at the circuit and system level. Physics-based models of the latency, energy dissipation, thermal stability, and error-rate of vTOPSS and MESO device will be developed and calibrated against large-scale Monte-Carlo simulations. Impact of potential interconnects, including metallic and semiconducting nanowires, on device performance will be quantified. Device-level models will be used to develop a standard cell library of Boolean logic gates with vTOPSS and MESO as the switching elements. The cell library will enable the quantification of performance metrics of magnetic-CMOS computing platform at scale. The physics-to-circuits approach adopted in this research will drive innovative concepts in circuit design that can maximize the competitiveness of the proposed technology.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.