EAGER: Storage-Based Logic Built-In Self-Test with Magnified Test Data
EAGER: Storage-Based Logic Built-In Self-Test with Magnified Test Data
批准号:
2041649
负责人:
Irith Pomeranz
金额:
$25.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2020
资助国家:
美国
项目状态:
已结题
起止时间:
2020-10-01 至 2023-09-30
中文摘要
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英文摘要
New technologies for manufacturing of electronic chips give rise to new defect mechanisms and increase the prevalence of defect occurrence. At the same time, applications such as automotive systems impose stricter requirements on reliability. Detecting the occurrence of defects is critical to the reliability of electronic chips, and the correct and safe operation of the many products that use them. Test sets used for manufacturing testing of electronic chips need to be comprehensive in their ability to detect and diagnose defects, but at the same time, satisfy cost constraints related to their storage and test application time. Each test needs to be utilized to the maximum to detect as many defects as possible of as many different types as possible to ensure that a cost-limited test set is able to achieve reliability goals. Such a test set is referred to as a focused test set, and is the subject of this project. The project will prepare students for the challenges of designing and manufacturing reliable electronic chips in current and future technologies, which is critical to the many US industries that rely on electronic chips. The PI will provide a role model and encourage women students to pursue degrees in the field of electrical and computer engineering. Through internship opportunities, students will get comprehensive training with both academic and industrial depth.To manage the complexity and variability in defect behaviors, fault models are used as abstract representations of defects, and a comprehensive set of tests targets the detection of faults from different models. However, faults from different models have similar tests, and the added value for defect detection diminishes as additional fault models are considered. Two complementary directions will be explored in this project for generating focused test sets. (1) Different fault models are used for providing comprehensive defect coverage. However, if faults of all types are considered equally important, a large number of tests results, and they are not all necessary for detecting or diagnosing defects. Instead, different faults should be used as complements of each other. The problem that will be considered in this project is how to partition target faults into subsets with similar (but not identical) detection conditions, and similar (but not identical) tests. A procedure for generating a focused test set will select non-similar representatives from each subset as targets for test generation, and thus produce tests that are well-utilized for defect detection and diagnosis. (2) In a basic test data compression scheme, each stored test is used for applying one test. Earlier works showed that the same stored test data can be used in more than one way to apply more tests. This allows the volume of test data to be reduced. The new observation that this project will utilize is that applying more tests based on the same stored test data is useful for improving the quality of a focused test set.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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Storage-Based Logic Built-in Self-Test With Multicycle Tests
基于存储的逻辑内置自测试和多周期测试
DOI:
10.1109/tcad.2021.3128446
发表时间:
2022
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
Storage-Based Logic Built-In Self-Test With Cyclic Tests
基于存储的逻辑内置自测试和循环测试
DOI:
10.1109/tcad.2022.3233737
发表时间:
2023
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
Storage-Based Built-In Self-Test for Gate-Exhaustive Faults
针对栅极穷举故障的基于存储的内置自检
DOI:
10.1109/tcad.2020.3035133
发表时间:
2021
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
Storage-Based Logic Built-In Self-Test With Partitioned Deterministic Compressed Tests
基于存储的逻辑内置自测试和分区确定性压缩测试
DOI:
10.1109/tvlsi.2023.3285691
发表时间:
2023
期刊:
IEEE Transactions on Very Large Scale Integration (VLSI
影响因子:
--
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
Zoom-In Feature for Storage-Based Logic Built-In Self-Test
基于存储的逻辑内置自检的放大功能
DOI:
10.1109/dft52944.2021.9568357
发表时间:
2021
期刊:
International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
影响因子:
--
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
共 8 条
SHF: Small: A Mosaic-Like Approach to the Selection of Fault Models
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批准号:1714147
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项目类别:Standard Grant
-
资助金额:$29.4万
-
财政年份:2017
-
负责人:Irith Pomeranz
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依托单位:
Collaborative Research: High Quality Tests for Scan Circuits
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批准号:0098091
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项目类别:Continuing Grant
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资助金额:$20.03万
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财政年份:2001
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负责人:Irith Pomeranz
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依托单位:
High-Quality Tests for Synchronous Sequential Circuits
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批准号:0049081
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项目类别:Standard Grant
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资助金额:$31.8万
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财政年份:2000
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负责人:Irith Pomeranz
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依托单位:
High-Quality Tests for Synchronous Sequential Circuits
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批准号:9725053
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项目类别:Standard Grant
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资助金额:$31.8万
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财政年份:1998
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负责人:Irith Pomeranz
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依托单位:
NSF Young Investigator: A New Search Strategy for Design Automation
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批准号:9357581
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项目类别:Continuing Grant
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资助金额:$31.25万
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财政年份:1993
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负责人:Irith Pomeranz
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依托单位:
High-Quality Tests for Combinational Circuits
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批准号:9220549
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项目类别:Continuing Grant
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资助金额:$24.35万
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财政年份:1993
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负责人:Irith Pomeranz
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依托单位:
RIA: Test Generation for Synchronous Sequential Circuits
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批准号:9109568
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项目类别:Standard Grant
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资助金额:$6.97万
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财政年份:1991
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负责人:Irith Pomeranz
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依托单位:
国内基金
海外基金
面向 In-Storage 智能计算的高性能 SSD 控制器研究
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批准号:ZCLJHSQY26F0401
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项目类别:省市级项目
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资助金额:--
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批准年份:2026
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负责人:何越
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依托单位:
面向in-storage智能计算的固态硬盘缓存管理优化
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批准号:
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项目类别:省市级项目
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资助金额:--
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批准年份:2022
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负责人:廖剑伟
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依托单位: