SHF: Small: A Mosaic-Like Approach to the Selection of Fault Models
SHF: Small: A Mosaic-Like Approach to the Selection of Fault Models
批准号:
1714147
负责人:
Irith Pomeranz
金额:
$29.4万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2017
资助国家:
美国
项目状态:
已结题
起止时间:
2017-09-01 至 2021-08-31
中文摘要
电子芯片在制造和使用过程中容易受到缺陷的影响。随着技术的进步,由于更复杂的制造工艺和更小的特征尺寸,对缺陷的敏感性增加。检测缺陷的发生对于电子芯片的正确运行以及包括它们在内的许多产品的正确和安全运行至关重要。这个项目将使学生准备好迎接挑战,在当前和未来的技术中设计和制造可靠的电子芯片。这个项目的PI是普渡大学的一名女性教员,她将为女性和代表不足的群体发挥榜样作用,鼓励她们在电气和计算机工程领域追求学位,从而为未来的工作队伍提供急需的多样性。为了管理缺陷行为的复杂性和可变性,故障模型被用作缺陷的抽象表示,并且一套全面的测试旨在从不同的模型中检测故障。然而,来自不同型号的故障可能有类似的测试,当测试不存在时,芯片某些区域的缺陷仍未被发现。为了解决检测整个电子芯片中缺陷的需要,在本项目中,将故障视为马赛克中的片断,目标是确保马赛克是完整的。当马赛克的每个区域都被足够数量的碎片覆盖时,就实现了完整性。在故障方面,例如,通过定义新的故障模型来补充现有的故障模型来实现完整性,从而独立于两个模型存在针对故障的测试。这种基于马赛克的方法将作为一个受行业启发的框架的一部分来实施,该框架使用商业工具产生关于可能发生的缺陷的信息。
英文摘要
Electronic chips are susceptible to defects that occur during their manufacturing as well as their lifetime. As technologies advance, the susceptibility to defects increases because of more complex manufacturing processes and smaller feature sizes. Detecting the occurrence of defects is critical to the correct operation of electronic chips, and the correct and safe operation of the many products that include them. This project will prepare students for the challenges of designing and manufacturing reliable electronic chips in current and future technologies. The PI of this project is a female faculty member at the Purdue university, and will play role model for women and underrepresented groups to encourage them for pursuing degrees in the field of electrical and computer engineering, thus contributing to the much needed diversity in the future workforce.To manage the complexity and variability in defect behaviors, fault models are used as abstract representations of defects, and a comprehensive set of tests targets the detection of faults from different models. However, faults from different models may have similar tests, and when tests do not exist, defects in certain areas of the chip remain uncovered. To address the need to detect defects in the entire electronic chip, in this project, the faults are considered as pieces in a mosaic, and the goal is to ensure that the mosaic is complete. Completeness is achieved when every area of the mosaic is covered by a sufficient number of pieces. In terms of faults, completeness is achieved, for example, by defining a new fault model to complement an existing one such that tests exist independently for faults from the two models. The mosaic-based approach will be implemented as part of an industry-inspired framework that produces information about likely-to-occur defects, and using commercial tools.
期刊论文(20)
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Skewed-Load Tests for Transition and Stuck-at Faults
针对过渡和固定故障的斜负载测试
DOI:
10.1109/tcad.2018.2873233
发表时间:
2019
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
Broadside Tests for Transition and Stuck-At Faults
针对过渡和固定故障的全面测试
DOI:
10.1109/tcad.2019.2935046
发表时间:
2020
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
PRESERVE: Static Test Compaction that Preserves Individual Numbers of Tests
PRESERVE:静态测试压实,保留单独的测试数量
DOI:
10.1109/tcad.2020.3005371
发表时间:
2021
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
DOI:
10.1109/tcad.2019.2928971
发表时间:
2020-10
期刊:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子:
2.9
作者:
[I. Pomeranz]
通讯作者:
I. Pomeranz
Incomplete Tests for Undetectable Faults to Improve Test Set Quality
对无法检测到的故障进行不完整测试以提高测试仪质量
DOI:
10.1145/3306493
发表时间:
2019
期刊:
ACM Transactions on Design Automation of Electronic Systems
影响因子:
1.4
作者:
[Pomeranz, Irith]
通讯作者:
Pomeranz, Irith
共 20 条
EAGER: Storage-Based Logic Built-In Self-Test with Magnified Test Data
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批准号:2041649
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项目类别:Standard Grant
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资助金额:$25.0万
-
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-
负责人:Irith Pomeranz
-
依托单位:
Collaborative Research: High Quality Tests for Scan Circuits
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High-Quality Tests for Synchronous Sequential Circuits
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资助金额:$31.8万
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财政年份:2000
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依托单位:
High-Quality Tests for Synchronous Sequential Circuits
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批准号:9725053
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项目类别:Standard Grant
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资助金额:$31.8万
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NSF Young Investigator: A New Search Strategy for Design Automation
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负责人:Irith Pomeranz
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依托单位:
High-Quality Tests for Combinational Circuits
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批准号:9220549
-
项目类别:Continuing Grant
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资助金额:$24.35万
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财政年份:1993
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负责人:Irith Pomeranz
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依托单位:
RIA: Test Generation for Synchronous Sequential Circuits
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批准号:9109568
-
项目类别:Standard Grant
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资助金额:$6.97万
-
财政年份:1991
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负责人:Irith Pomeranz
-
依托单位:
国内基金
海外基金
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