CAREER: Efficient, Dynamic, Robust, and On-Device Continual Deep Learning with Non-Volatile Memory based In-Memory Computing System

职业：使用基于非易失性内存的内存计算系统进行高效、动态、鲁棒、设备上持续深度学习

• 批准号: 2144751
• 负责人: Deliang Fan
• 金额: $ 50万
• 依托单位: Arizona State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2022
• 资助国家: 美国
• 起止时间: 2022-01-15 至 2023-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2144751&HistoricalAwards=false
• 关键词: CAREER; Efficient; Dynamic; Robust; Device

This award is funded in whole or in part under the American Rescue Plan Act of 2021 (Public Law 117-2).Over past decades, there have existed grand challenges in developing high performance and energy-efficient computing solutions for big-data processing. Meanwhile, owing to the boom in artificial intelligence (AI), especially Deep Neural Networks (DNNs), such big-data processing requires efficient, intelligent, fast, dynamic, robust, and on-device adaptive cognitive computing. However, those requirements are not sufficiently satisfied by existing computing solutions due to the well-known power wall in silicon-based semiconductor devices, the memory wall in traditional Von-Neuman computing architectures, and computation-/memory-intensive DNN computing algorithms. This project aims to foster a systematic breakthrough in developing AI-in-Memory computing systems, through collaboratively developing ahybrid in-memory computing (IMC) hardware platform integrating the benefits of emerging non-volatile resistive memory (RRAM) and Static Random Access Memory (SRAM) technologies, as well as incorporating IMC-aware deep-learning algorithm innovations. The overarching goal of this project is to design, implement, and experimentally validate a new hybrid in-memory computing system that is collaboratively optimized for energy efficiency, inference accuracy, spatiotemporal dynamics, robustness, and on-device learning, which will greatly advance AI-based big-data processing fields such as computer vision, autonomous driving, robotics, etc. The research will also be extended into an educational platform, providing a user-friendly learning framework, and will serve the educational objectives for K-12 students, undergraduate, graduate, and under-represented students.This project will advance knowledge and produce scientific principles and tools for a new paradigm of AI-in-Memory computing featuring significant improvements in energy efficiency, speed, dynamics, robustness, and on-device learning capability. This cross-layer project spans from device, circuit, and architecture to DNN algorithm exploration. First, a hybrid RRAM-SRAM based in-memory computing chip will be designed, optimized, and fabricated. Second, based on this new computing platform, the on-device spatiotemporal dynamic neural network structure will be developed to provide an enhanced run-time computing profile (latency, resource allocation, working load, power budget, etc.), as well as improve the robustness of the system against hardware intrinsic and adversarial noise injection. Then, efficient on-device learning methodologies with the developed computing platform will be investigated. In the last thrust, an end-to-end DNN training, optimization, mapping, and evaluation CAD tool will be developed that integrates the developed hardware platform and algorithm innovations, for optimizing the software and hardware co-designs to achieve the user-defined multi-objectives in latency, energy efficiency, dynamics, accuracy, robustness, on-device adaption, etc.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

该奖项是根据2021年《美国救援计划法》（公法117-2）的全部或部分资助的。在过去的几十年中，在开发用于大数据处理的高性能和节能计算解决方案方面存在着巨大的挑战。同时，由于人工智能的繁荣（AI），尤其是深神经网络（DNNS），因此如此大的数据处理需要有效，智能，快速，动态，强大的，健壮的和exp依的自适应认知计算。但是，由于基于硅的半导体设备中众所周知的电源壁，传统的von-neuman计算体系结构中的记忆墙以及计算/内存密集型DNN计算算法，因此由于现有的计算解决方案无法充分满足这些要求。 This project aims to foster a systematic breakthrough in developing AI-in-Memory computing systems, through collaboratively developing ahybrid in-memory computing (IMC) hardware platform integrating the benefits of emerging non-volatile resistive memory (RRAM) and Static Random Access Memory (SRAM) technologies, as well as incorporating IMC-aware deep-learning algorithm innovations.该项目的总体目标是设计，实施和实验验证一个新的混合内存中内存计算系统，该系统对能源效率，推理的准确性，时空动态，稳健性和设备学习进行了协作优化，该系统将大大推动AI基于AI的计算机视野，以及诸如Robists oberics of Robics等，该领域将大大推动AI基于AI的研究。用户友好的学习框架，并将为K-12学生，本科，研究生和代表性不足的学生提供教育目标。该项目将促进知识并生成科学原理和工具，以实现AI-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In-In计算计算范围，这些计算具有重大改进的能力，速度，动力学，动力学，强大的，鲁棒性，鲁棒性，稳健性，以及竞技场，以及竞技学能力。这个跨层项目跨越设备，电路和体系结构到DNN算法探索。首先，将设计，优化和制造一个基于混合RRAM-SRAM的内存计算芯片。其次，基于这个新的计算平台，将开发在设备上的时空动态神经网络结构，以提供增强的运行时计算配置文件（延迟，资源分配，工作负载，功率预算等），并提高系统对硬件内固有性和对抗性噪声的稳健性。然后，将研究使用开发的计算平台的有效的启动学习方法。 In the last thrust, an end-to-end DNN training, optimization, mapping, and evaluation CAD tool will be developed that integrates the developed hardware platform and algorithm innovations, for optimizing the software and hardware co-designs to achieve the user-defined multi-objectives in latency, energy efficiency, dynamics, accuracy, robustness, on-device adaption, etc.This award reflects NSF's statutory mission and has been认为值得通过基金会的智力优点和更广泛影响的评论标准来评估值得支持。

项目成果

DSPIMM: A Fully Digital SParse In-Memory Matrix Vector Multiplier for Communication Applications

DSPIMM：用于通信应用的全数字稀疏内存矩阵向量乘法器

• 发表时间: 2023
• 期刊: 2023 60th ACM/IEEE Design Automation Conference (DAC
• 作者: Sridharan, Amitesh;Zhang, Fan;Sui, Yang;Yuan, Bo;Fan, Deliang
• 通讯作者: Fan, Deliang

DA3: Dynamic Additive Attention Adaption for Memory-Efficient On-Device Multi-Domain Learning

DA3：动态加性注意力适应，实现内存高效的设备上多域学习

• DOI: 10.1109/cvprw56347.2022.00295
• 发表时间: 2022
• 期刊: IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR
• 作者: Yang, Li' Rakin;Fan, Deliang
• 通讯作者: Fan, Deliang

A 1.23-GHz 16-kb Programmable and Generic Processing-in-SRAM Accelerator in 65nm

采用 65nm 工艺的 1.23GHz 16kb 可编程通用 SRAM 处理加速器

• DOI: 10.1109/esscirc55480.2022.9911440
• 发表时间: 2022
• 期刊: 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC
• 作者: Sridharan, Amitesh;Angizi, Shaahin;Cherupally, Sai Kiran;Zhang, Fan;Seo, Jae-Sun;Fan, Deliang
• 通讯作者: Fan, Deliang

Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration

• DOI: 10.1109/tcad.2022.3197516
• 发表时间: 2022-11
• 期刊: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• 影响因子: 2.9
• 作者: Gokul Krishnan;Zhenyu Wang;Injune Yeo;Li Yang-;Jian Meng;Maximilian Liehr;R. Joshi;N. Cady;Deliang Fan;Jae-sun Seo;Yu Cao

FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro

• DOI: 10.1109/esscirc59616.2023.10268770
• 发表时间: 2023-09
• 期刊: ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
• 作者: Jyotishman Saikia;Amitesh Sridharan;Injune Yeo;S. Venkataramanaiah;Deliang Fan;J.-s. Seo