权益分类	功能权益	普通用户	{{item.name}}会员
{{category.name}}	{{benefitItem.name}}

E2CDA: Type II: Non-Volatile In-Memory Processing Unit: Memory, In-Memory Logic and Deep Neural Network

E2CDA：II 类：非易失性内存中处理单元：内存、内存中逻辑和深度神经网络

基本信息

批准号：
2005209
负责人：
Deliang Fan
金额：
$ 11.7万
依托单位：
Arizona State University
依托单位国家：
美国
项目类别：
Continuing Grant
财政年份：
2019
资助国家：
美国
起止时间：
2019-08-01 至 2021-08-31
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=2005209&HistoricalAwards=false
关键词：
E2CDA Type II Non Volatile

项目摘要

The objective of this project is to explore leveraging emerging nanoscale spin-orbit torque magnetic random access memory (SOT-MRAM) to develop a non-volatile in-memory processing unit that could simultaneously work as non-volatile memory and a co-processor for next-generation energy efficient and high performance computing system. Such energy efficient in-memory computing system integrates logic and memory units by exploring innovations from emerging spintronic device technology to non-Von Neumann architecture, which is targeting to tackle power wall and memory wall bottlenecks in traditional computing system. It will be crucial for industry and academia to identify next-generation energy efficient and high performance computing platform design. The project also has education and outreach components including new curriculum in post-CMOS devices and circuits for undergraduate/graduate students, engineering outreach to diverse population and other underrepresented groups at the University of central Florida. The project will also directly involve minority and female graduate/ undergraduate students.The proposed research requires synergistic exploration spanning from device technology to architecture innovation. Specifically, it consists of three research thrusts: (i) exploring novel SOT-MRAM memory array that could implement in-memory logic (AND/OR/XOR) without add-on logic circuits; (ii) investigating non-volatile in-memory processing unit (MPU) architecture that could simultaneously work as nonvolatile memory and co-processor to pre-process raw data within memory to accelerate data/computing intensive applications without sacrificing memory capacity; (iii) exploring MPU to implement in-memory convolution to greatly reduce data communication and accelerate state-of-the-art deep learning convolutional neural networks.

本项目的目的是探索利用新兴的纳米级自旋轨道扭矩磁性随机存取存储器（SOT-MRAM）开发一种非易失性内存处理单元，该单元可以同时作为非易失性内存和下一代节能和高性能计算系统的协处理器。这种节能的内存计算系统通过探索从新兴的自旋电子器件技术到非冯·诺依曼架构的创新来集成逻辑和内存单元，其目标是解决传统计算系统中的功率墙和内存墙瓶颈。对于工业界和学术界来说，确定下一代节能和高性能计算平台设计至关重要。该项目还包括教育和外展部分，包括为本科生/研究生开设的CMOS后器件和电路新课程，向不同人群和佛罗里达中部大学其他代表性不足的群体提供工程外展。该项目还将直接涉及少数民族和女性研究生/本科生。拟议的研究需要从设备技术到架构创新的协同探索。具体而言，它包括三个研究方向：（i）探索新的SOT-MRAM存储器阵列，可以实现存储器内逻辑（ii）研究非易失性存储器内处理单元（MPU）架构，其可以同时作为非易失性存储器和协处理器工作以预处理存储器内的原始数据，从而在不牺牲存储器容量的情况下加速数据/计算密集型应用;（iii）探索MPU来实现内存卷积，以大大减少数据通信并加速最先进的深度学习卷积神经网络。