Collaborative Research: FuSe: Efficient Situation-Aware AI Processing in Advanced 2-Terminal SOT-MRAM

计算系统需要分析的数据量已经急剧增加到艾级(即数十亿GB)甚至更高。同时，由于人工智能(AI)特别是深度神经网络(DNN)的蓬勃发展，人们对基于AI的高性能、高效、快速和自适应的大数据处理系统提出了更高的要求。然而，由于硅基半导体器件中的电源墙、传统冯-诺伊曼计算体系中的存储墙以及基于DNN的超计算和内存密集型人工智能算法，现有的计算解决方案无法充分满足这些要求。该项目汇集了一组跨学科的研究人员，他们的专业知识涵盖材料科学、器件制造、集成电路设计、计算机体系结构和人工智能算法，以进行创新的设备-电路-算法联合设计，以开发能够利用新兴的非易失性磁存储器技术来实施高效的AI数据处理以及片上持续学习的AI处理(AI-PIM)系统。该项目的目标是显著提高AI数据处理的能效，效率是最先进的图形处理单元(GPU)的100倍。该项目将极大地惠及多个应用领域，如自动驾驶、机器人、个性化认知语音和智能互联健康等。该项目还将涉及教育和劳动力发展活动，包括K-12 STEM外展、本科生/研究生培训、半导体课程开发、半导体行业实习指导、洁净室制造实习、高级集成电路设计课程。它还将鼓励女性和代表性不足的少数群体更广泛地参与微电子和半导体芯片行业。该项目将推进知识，并进行跨层研究，从新兴的自旋轨道扭矩磁随机存取存储器(SOT-MRAM)材料、器件、电路、架构，到三个主要交织推力的AI算法探索。推力1将探索SOT材料(如MnPd3)中的非传统自旋以及新颖的器件几何结构，以制造新设计的双端SOT-MRAM，该设计同时提供无限耐久、纳秒编程时间、非常高的单元密度、无外部磁场的确定性编程、零泄漏和非易失性。利用开发的2端子SOT-MRAM，推力2将设计并流片出一个AI内存中处理(PIM)芯片，以实现支持神经网络前向和后向计算的全数字“内存中稀疏乘法和累加(MAC)”运算。按照共同设计的方法论，推力3将首先研究自动网络体系结构搜索方法，以构建最适合给定情况的AI模型，同时考虑到我们的AI-PIM系统限制。这一努力将进一步开发新颖的PIM友好、计算和内存高效、情景感知的持续学习算法，可以将耗电的芯片上权重更新(即内存写入)的复杂性降至最低，同时学习新的情景和用户特定数据。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The amount of data required to be analyzed by computing systems has been increasing drastically to exascale (i.e., billions of gigabytes) and beyond. Meanwhile, owing to the boom in artificial intelligence (AI), especially Deep Neural Network (DNN), there is a need for high performance, efficient, fast, and adaptive AI-based big data processing systems. However, those requirements are not sufficiently met by existing computing solutions due to the power-wall in silicon-based semiconductor devices, memory-wall in traditional Von-Neuman computing architecture, and ultra computation- and memory-intensive DNN-based AI algorithms. This project brings together an interdisciplinary group of researchers, with expertise spanning from material science, device fabrication, integrated circuit design, computer architecture, and AI algorithms to undertake innovative device-circuit-algorithm co-design for developing an AI Processing-In-Memory (AI-PIM) system that could leverage the emerging non-volatile magnetic memory technology to implement efficient AI data processing, as well as situation-aware on-chip continual learning. This project targets to significantly improve the AI data processing energy efficiency, with 100X higher efficiency than that of state-of-the-art Graph Processing Units (GPUs). The project will greatly benefit various application areas, such as autonomous driving, robotics, personalized cognitive speech, and smart connected health, etc. This project will also involve education and workforce development activities, including K-12 STEM outreach, undergraduate/graduate training, curriculum development in semiconductor, semiconductor industry internship mentoring, cleanroom fab internships, advance integrated circuit design courses. It will also encourage broader participation of female and under-represented minorities in the microelectronics and semiconductor chip industry. This project will advance knowledge and conduct cross-layer research spanning from emerging Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM) material, device, circuit, architecture, to AI algorithm exploration with three main interweaved thrusts. Thrust 1 will explore unconventional spins in SOT materials, e.g., MnPd3, and novel device geometry to fabricate a new design of 2-terminal SOT-MRAM, which simultaneously delivers unlimited endurance, nano-seconds programming time, very high cell density, deterministic programming without external magnetic field, zero leakage, and non-volatility. Leveraging the developed 2-terminal SOT-MRAM, Thrust 2 will design and tape-out an AI Processing-in-Memory (PIM) chip to implement fully digital ‘in-memory sparse multiplication-and-accumulation (MAC)’ operations that support both forward and backward computations of neural networks. Following a co-design methodology, Thrust 3 will first investigate automated network architecture search methods to construct AI model best suitable for given situation while considering our AI-PIM system constraint. This thrust will further develop novel PIM-friendly, compute- and memory-efficient, situation-aware continual learning algorithms that could minimize the power-hungry on-chip weight update (i.e., memory write) complexity, while learning new situation- and user-specific data.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.