Collaborative Research: FuSe: Efficient Situation-Aware AI Processing in Advanced 2-Terminal SOT-MRAM

需要由计算系统分析的数据量已经急剧增加到兆兆（exascale）（即，数十亿千兆字节）和更大。与此同时，由于人工智能（AI），特别是深度神经网络（DNN）的蓬勃发展，需要高性能，高效，快速和自适应的基于AI的大数据处理系统。然而，由于硅基半导体器件中的功率墙、传统冯-纽曼计算架构中的存储器墙以及基于DNN的超计算和存储密集型AI算法，现有计算解决方案无法充分满足这些要求。该项目汇集了一个跨学科的研究人员小组，具有材料科学，设备制造，集成电路设计，计算机架构和AI算法的专业知识，以进行创新的设备-电路-算法协同设计，用于开发AI内存处理（AI-PIM）系统，该系统可以利用新兴的非易失性磁存储器技术来实现高效的AI数据处理，以及情况感知的片上持续学习。该项目旨在显著提高AI数据处理的能效，其效率比最先进的图形处理单元（GPU）高出100倍。该项目还将涉及教育和劳动力发展活动，包括K-12 STEM推广，本科生/研究生培训，半导体课程开发，半导体行业实习指导，洁净室工厂实习，先进的集成电路设计课程。它还将鼓励妇女和代表性不足的少数群体更广泛地参与微电子和半导体芯片行业。该项目将推进知识，并进行跨层研究，从新兴的自旋轨道扭矩磁性随机存取存储器（SOT-MRAM）材料，器件，电路，架构，到AI算法探索，三个主要交织的推力。推力1将探索SOT材料中的非常规自旋，例如，MnPd 3和新颖的器件几何结构来制造一种新的双端SOT-MRAM设计，它同时提供无限的耐久性、纳秒级编程时间、非常高的单元密度、无外部磁场的确定性编程、零泄漏和非易失性。利用开发的双端SOT-MRAM，Thrust 2将设计和流片一个AI内存处理（PIM）芯片，以实现全数字的“内存稀疏乘法和累加（MAC）”操作，支持神经网络的前向和后向计算。根据协同设计方法，Thrust 3将首先研究自动网络架构搜索方法，以构建最适合给定情况的AI模型，同时考虑我们的AI-PIM系统约束。这一推动将进一步开发新颖的PIM友好的、计算和存储器高效的、情境感知的持续学习算法，这些算法可以最小化耗电的片上权重更新（即，该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

The amount of data required to be analyzed by computing systems has been increasing drastically to exascale (i.e., billions of gigabytes) and beyond. Meanwhile, owing to the boom in artificial intelligence (AI), especially Deep Neural Network (DNN), there is a need for high performance, efficient, fast, and adaptive AI-based big data processing systems. However, those requirements are not sufficiently met by existing computing solutions due to the power-wall in silicon-based semiconductor devices, memory-wall in traditional Von-Neuman computing architecture, and ultra computation- and memory-intensive DNN-based AI algorithms. This project brings together an interdisciplinary group of researchers, with expertise spanning from material science, device fabrication, integrated circuit design, computer architecture, and AI algorithms to undertake innovative device-circuit-algorithm co-design for developing an AI Processing-In-Memory (AI-PIM) system that could leverage the emerging non-volatile magnetic memory technology to implement efficient AI data processing, as well as situation-aware on-chip continual learning. This project targets to significantly improve the AI data processing energy efficiency, with 100X higher efficiency than that of state-of-the-art Graph Processing Units (GPUs). The project will greatly benefit various application areas, such as autonomous driving, robotics, personalized cognitive speech, and smart connected health, etc. This project will also involve education and workforce development activities, including K-12 STEM outreach, undergraduate/graduate training, curriculum development in semiconductor, semiconductor industry internship mentoring, cleanroom fab internships, advance integrated circuit design courses. It will also encourage broader participation of female and under-represented minorities in the microelectronics and semiconductor chip industry. This project will advance knowledge and conduct cross-layer research spanning from emerging Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM) material, device, circuit, architecture, to AI algorithm exploration with three main interweaved thrusts. Thrust 1 will explore unconventional spins in SOT materials, e.g., MnPd3, and novel device geometry to fabricate a new design of 2-terminal SOT-MRAM, which simultaneously delivers unlimited endurance, nano-seconds programming time, very high cell density, deterministic programming without external magnetic field, zero leakage, and non-volatility. Leveraging the developed 2-terminal SOT-MRAM, Thrust 2 will design and tape-out an AI Processing-in-Memory (PIM) chip to implement fully digital ‘in-memory sparse multiplication-and-accumulation (MAC)’ operations that support both forward and backward computations of neural networks. Following a co-design methodology, Thrust 3 will first investigate automated network architecture search methods to construct AI model best suitable for given situation while considering our AI-PIM system constraint. This thrust will further develop novel PIM-friendly, compute- and memory-efficient, situation-aware continual learning algorithms that could minimize the power-hungry on-chip weight update (i.e., memory write) complexity, while learning new situation- and user-specific data.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.