Collaborative Research: SHF: Medium: Revitalizing EDA from a Machine Learning Perspective

合作研究：SHF：媒介：从机器学习的角度振兴 EDA

• 批准号: 2106828
• 负责人: Yiran Chen
• 金额: $ 41万
• 依托单位: Duke University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-10-01 至 2025-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2106828&HistoricalAwards=false
• 关键词: Collaborative; Research; SHF; Medium; Revitalizing

Despite its spectacular success in the past, design automation of electronic circuits and systems remains limited in effectiveness and efficiency. This is often due to unnecessarily excessive iterations of point software tools, where early predictions on downstream design steps are overly pessimistic and interoperations among different tools largely require manual handling. As such, existing chip-design flows are not considered fully automated, and there still exists a strong need for jointly exploring the considerable room between the different steps in these flows. Moreover, existing design-verification approaches usually involve unwanted redundancy and substantial manual effort, contributing greatly to a well-known bottleneck of time-to-market. The recent progress in machine-learning technology offers a great opportunity to revitalize current Electronic Design Automation (EDA) flows from an alternative perspective, i.e., extracting design and verification knowledge from existing design data, and reusing it on new designs. The goal of this research is to develop such knowledge extraction and reuse techniques with the aid of the state-of-the-art machine learning technology. The outcome of this research is to help mitigate the chip-design productivity crisis and cater to the increasing demand for hardware-accelerated computing. This research is also training students, including women and under-represented minorities, with interdisciplinary skills and preparing tomorrow’s high-tech workforce in the U.S. for solving challenges in the electronic industry.The project involves systematic research on machine learning in the context of electronic design automation with five integrated components: 1) development of learning-based fast and high fidelity prediction techniques for knowledge extraction in the structural and behavioral domains of circuit designs; 2) a study on how to seamlessly integrate the design predictions with circuit optimizations; 3) applying machine-learning prediction to accelerating functional-verification coverage and facilitating automated debugging; 4) developing autonomous learning on the interplay amongst tools and thereby achieving automated synthesis space exploration; 5) automated machine-learning architecture search and feature refinement in EDA applications.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

尽管过去取得了令人瞩目的成功，但电子电路和系统的设计自动化在有效性和效率方面仍然有限。这通常是由于单点软件工具不必要的过度迭代，其中对下游设计步骤的早期预测过于悲观，不同工具之间的互操作在很大程度上需要手动处理。因此，现有的芯片设计流程并不被认为是完全自动化的，仍然有强烈的需求共同探索这些流程中不同步骤之间的相当大的空间。此外，现有的设计验证方法通常涉及不想要的冗余和大量的人工工作，这极大地造成了众所周知的上市时间瓶颈。机器学习技术的最新进展为从另一种角度振兴当前的电子设计自动化(EDA)流程提供了一个很好的机会，即从现有的设计数据中提取设计和验证知识，并在新的设计中重复使用这些知识。本研究的目标是在最先进的机器学习技术的帮助下，开发这样的知识提取和重用技术。这项研究的结果是帮助缓解芯片设计生产率危机，并迎合对硬件加速计算日益增长的需求。这项研究还在培训学生，包括女性和未被充分代表的少数族裔，掌握跨学科技能，并为美国未来的高科技劳动力做好准备，以应对电子行业的挑战。该项目涉及电子设计自动化背景下的机器学习的系统研究，包括五个集成组件：1)开发基于学习的快速高保真预测技术，用于电路设计的结构和行为领域的知识提取；2)研究如何将设计预测与电路优化无缝集成；3)应用机器学习预测来加速功能验证覆盖和促进自动化调试；4)开发工具之间相互作用的自主学习，从而实现自动化综合空间探索；5)EDA应用中的自动化机器学习架构搜索和特征改进。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

How Good Is Your Verilog RTL Code?: A Quick Answer from Machine Learning

• DOI: 10.1145/3508352.3549375
• 发表时间: 2022-10
• 期刊: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
• 作者: Prianka Sengupta;Aakash Tyagi;Yiran Chen;Jiangkun Hu

DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters

• DOI: 10.1145/3508352.3549427
• 发表时间: 2022-10
• 期刊: 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
• 作者: Zhiyao Xie;Shiyu Li;Mingyuan Ma;Chen-Chia Chang;Jingyu Pan;Yiran Chen;Jiangkun Hu

Preplacement Net Length and Timing Estimation by Customized Graph Neural Network

• DOI: 10.1109/tcad.2022.3149977
• 发表时间: 2022-11
• 期刊: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• 影响因子: 2.9
• 作者: Zhiyao Xie;Rongjian Liang;Xiaoqing Xu;Jiangkun Hu;Chen-Chia Chang;Jingyu Pan;Yiran Chen

Automatic Routability Predictor Development Using Neural Architecture Search

• DOI: 10.1109/iccad51958.2021.9643483
• 发表时间: 2020-12
• 期刊: 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
• 作者: Jingyu Pan;Chen-Chia Chang;Tunhou Zhang;Zhiyao Xie;Jiang Hu;Weiyi Qi;Chung-Wei Lin;Rongjian Liang;Joydeep Mitra;Elias Fallon;Yiran Chen

The Dark Side: Security and Reliability Concerns in Machine Learning for EDA

• DOI: 10.1109/tcad.2022.3199172
• 发表时间: 2023-04
• 期刊: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• 影响因子: 2.9
• 作者: Zhiyao Xie;Jingyu Pan;Chen-Chia Chang;Jiangkun Hu;Yiran Chen