Charge compensation in 4H silicon carbide - Simulation, modelling and experimental verification

对于功率半导体器件，在相邻的p和n掺杂半导体区域之间采用电荷补偿的器件模式。这些模式使得单极器件在阻塞操作下具有阻塞电压，在正向传导时器件电阻低。首先，采用电荷补偿模式在碳化硅中制造的半导体器件遵循设计规则，这些规则要么基于基于良好控制的硅技术的理论计算，要么使用非经验的试错方法。因此，补偿模式的适当设计要么完全具有较差的补偿程度，要么仅通过重复的过程变化来实现。本课题旨在为实现具有高补偿度的电荷补偿模式提供基础，并对其电特性和物理效应的影响进行系统的研究。特别地，研究了SiC中掺杂物的不完全活化和不完全电离以及表面钝化对补偿程度、击穿电压和漂移电阻的影响。这允许改进现有的模拟模型，以获得更高的精度，并推导出这些电荷补偿模式的分析描述，这些模式不是（如硅）基于完全控制的半导体技术。以硅中电荷补偿模式为出发点，考虑掺杂剂的不完全活化，对碳化硅中横向电荷补偿模式进行了建模和二维TCAD模拟。为了提高建模精度和基于测量结果的基础模型的扩展性，采用了与仿真结果相对应的横向测试图的制作及其电特性。然后使用这些模型将结果传递并验证到SiC中的横向功率晶体管。此外，将进行动态开关实验，以评估电荷补偿模式中不完全电离等物理效应对电学特性（例如雪崩击穿）的影响。最后，将实现垂直电荷补偿模式，从整体上验证该科学方法的方法论。本研究项目的结果将通过提供精确的电荷补偿物理模型，简化在4H-SiC上横向和垂直功率半导体器件的制造。

For power semiconductor devices in silicon, device patterns with charge compensation between adjacent p- and n-doped semiconductor regions are applied. These patterns enable the realization of unipolar devices with blocking voltage under blocking operation and low device resistance in forward conduction. First semiconductor devices fabricated in silicon carbide employing charge compensation patterns are following design rules that are either based on theoretical calculations which are based on the well-controlled silicon technology or using non-empiric trial-and-error methods. Hereby, a suitable design of the compensation patterns is achieved either with a poor degree of compensation at all or only by repetitive process variations.This proposal is aiming to provide the foundation for the realization of charge compensation patterns with a high degree of compensation, and to conduct a systematic investigation regarding their electrical characteristics and the impact of physical effects. In particular, the impact of incomplete activation and ionization of dopants in SiC as well as the surface passivation on the degree of compensation, the breakdown voltage and the drift resistance is investigated. This allows for an improvement of existing simulation models for higher accuracy and the derivation of an analytical description of these charge compensation patterns that are not (as in silicon) based on a fully controlled semiconductor technology.With the aid of analytical modelling based on charge compensation patterns in silicon as a starting point and considering incomplete activation of dopants, both modelling and two dimensional TCAD simulations for lateral charge compensation patterns in silicon carbide will be implemented. The fabrication of lateral test patterns corresponding to the simulations and their electric characterization are used to increase the modelling accuracy and extension of the underlying models based on the measurement results. These models are then used to transfer and verify the results to lateral power transistors in SiC. Additionally, dynamic switching experiments will be carried out to evaluate the impact of physical effects like incomplete ionisation on electrical properties (e.g. avalanche breakdown) in charge compensation patterns. Finally, vertical charge compensation patterns will be realized to validate the methodology of this scientific approach as a whole.The results from this research project will simplify the fabrication of lateral and vertical power semiconductor devices on 4H-SiC by provision of accurate physical models for charge compensation.