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Investigation on gate insulators for InP MIS field effect transistors with in-situ photo-CVD

In-P MIS 场效应晶体管栅极绝缘体的原位光化学气相沉积研究

基本信息

批准号：
01460135
负责人：
SUGANO Takuo
金额：
$ 5.31万
依托单位：
University of Tokyo
依托单位国家：
日本
项目类别：
Grant-in-Aid for General Scientific Research (B)
财政年份：
1989
资助国家：
日本
起止时间：
1989 至 1991
项目状态：
已结题

项目摘要

We have succeeded to fabricate InP MIS FETs with relatively good properties by the end of the last year. This year we investigated correlations between properties of InP surface and kinds of gate insulator or process conditions of fabricating InP MIS FET in order to get much better FETs.Laser Raman spectroscopy and photoluminescence method were used to characterize InP surface because formation of electrodes are not necessary in these methods.Stress in semiconductors can be estimated based on extra shift of a phonon frequency which is measured clear that InP with SiO_2 or Si_3N_4 film has tensile stress in the order of 10^9 dyn/cm^2 while InP with PN film deposited by photo-CVD has negligible stress.Surface recombination velocity can be estimated from the analysis of LO phononplasmon coupled mode which is measured by Raman spectroscopy. Surface recombination velocity of InP with PN film deposited by photo-CVD method at a relatively low temperature such as 150ﾟC after sulfer treatment of InP surface was smaller than those of InP with SiO_2 or Si_3N_4 film by about one order. The results were supported by photoluminescence and C-V methods and will have important roles in determining optimum conditions of fabricating InP MISFETs with high quality.

到去年年底，我们已经成功地制造出性能较好的InP MIS FET。为了获得更好的场效应晶体管，我们研究了InP表面性质与栅绝缘层种类或工艺条件的关系。由于激光拉曼光谱和光致发光法不需要形成电极，因此可以用来表征InP表面。半导体中的应力可以根据声子频率的额外偏移来估计，这种声子频率的额外偏移可以清楚地测量出InP表面的应力。由于InP表面的应力是由半导体中的声子频率的偏移来估计的，所以我们采用了激光拉曼光谱和光致发光法来表征InP表面的应力。由于半导体中的声子频率的额外偏移是由半导体中的声子频率的偏移来估计的，所以我们采用了激光拉曼光谱和光致发光法来表征InP表面的应力。由于半导体中的声子频率的额外偏移是由半导体中的声子频率的偏移来估计的，所以我们采用了激光拉曼光谱和光致发光法来表征InP表面的应力用SiO_2或Si_3N_4薄膜制备的InP具有10^9 dyn/cm ^2量级的拉应力，而用光化学气相沉积法制备的InP具有PN薄膜的InP具有可忽略的拉应力，用拉曼光谱测量的LO声子等离激元耦合模可以估算表面复合速度。在较低温度下（150 ℃），用光化学气相沉积法沉积的InP表面硫处理后的PN膜的表面复合速度比用SiO_2或Si_3N_4膜的InP的表面复合速度小一个数量级。这些结果得到了光致发光和C-V方法的支持，对确定制备高质量InP MISFET的最佳工艺条件具有重要意义。