A Study on fully inverted SIMOX MOSFETs
全反相SIMOX MOSFET的研究
基本信息
- 批准号:09650389
- 负责人:
- 金额:$ 2.5万
- 依托单位:
- 依托单位国家:日本
- 项目类别:Grant-in-Aid for Scientific Research (C)
- 财政年份:1997
- 资助国家:日本
- 起止时间:1997 至 1998
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Electrical characteristics of SOI MOSFETs was investigated by the device sirnulator CADDETH and it is found that threshold voltage is reduced to aroud 1(v)and short channel effect was suppressed by Fully Inverted (F1)SOI MOSFETs, which were proposed by the authors.The FI(fully inverted)SOI MOSFET is a novel type of SOI MOSFETs where the whole region of the top silicon layer is inverted completely. In FI SOI MOSFETs, the depleted region is eliminated by thinning the top silicon layer, and the gate electric field induces charge in the channel more effectively than in the fully depleted(FD)SOI MOSFET<s. In consequence, FI SOI MOSFETs are expected to have advantages that the threshold voltage(VィイD2thィエD2)can be lowered maintaining dopant density high and also the short channel effect can be suppressed substantially. In FI SOI MOSFETs, the depleted region is eliminated by thinning the top silicon layer, and the gate electric field induces charge in the channel more effectively than in the fully depleted(FD)SOI MOSFETs. In consequence, it is found that in FI SOI MOSFETs, the threshold voltage(VィイD2thィエD2)can be lowered keepnig dopant density high and also the roll-off of VィイD2thィエD2 can be suppressed substantially. The behavior of VィイD2thィエD2 in SOI MOSFETs is shown in the figure. When the thickness of top Si layer(tィイD2SiィエD2)is less than 10(nm), and MOSFET is in FI mode, the dependence of VィイD2thィエD2 on tィイD2SiィエD2 is suppressed remarkably.FI SOI MOSFETs can realize high packing density, short signal propagation delay, together with a low voltage power supply less than 1V, and are one of the most feasible devices for low power VLSI.
利用器件测试仪CADDETH对SOI MOSFET的电学特性进行了研究,发现作者提出的全反转(F1)SOI MOSFET可以将阈值电压降低到1(V)左右,并抑制了短沟效应。FI(全反转)SOI MOSFET是一种新型的SOI MOSFET,其顶层硅层的整个区域是完全反转的。在FISOI MOSFET中,通过减薄顶部硅层来消除耗尽区,栅极电场在沟道中诱导电荷的效果比全耗尽(FD)SOI MOSFET和S更有效。因此,FI MOSFET有望具有以下优点:阈值电压(VィイD2thィエD2)可以降低,掺杂浓度保持在较高水平,并且短沟效应可以得到很大程度的抑制。在FISOI MOSFET中,通过减薄顶部硅层来消除耗尽区,并且栅极电场比全耗尽(FD)SOI MOSFET更有效地在沟道中诱导电荷。结果发现,在FISOI MOSFET中,阈值电压(VィイD2thィエD2)可以在保持高掺杂密度的情况下被降低,并且VィイD2thィエD2的滚降也可以被基本抑制。SOI MOSFET中VィイD2thィエD2的行为如图所示。当顶层硅层厚度(tィイD2SiィエD2)小于10(Nm),并且MOSFET处于FI模式时,VィイD2thィエD2对tィイD2SiィエD2的依赖被显著抑制,FI SOI MOSFET可以实现高堆积密度、短信号传播延迟以及小于1V的低电压电源,是最适合于低功耗VLSI的器件之一。
项目成果
期刊论文数量(0)
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专利数量(0)
池田,鳥谷部,花尻,菅野: "全反転型SOI MOSFET(IV)"第58回応用物理学会学術講演会予稿集. II. 15a-pq-13 (1998)
Ikeda、Toriyabe、Hanajiri、Kanno:“全倒置 SOI MOSFET (IV)”第 58 届日本应用物理学会年会记录 II(15a-pq-13)。
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- 影响因子:0
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池田,鳥谷部,花尻,菅野: "完全反転型SOI MOSFET(III)"第45回応用物理学関係連合講演会予稿集. II. 30a-YE-4 (1998)
Ikeda、Toriyabe、Hanajiri、Kanno:“完全倒置 SOI MOSFET (III)”第 45 届应用物理协会会议记录 II (1998)。
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K. Ikeda, T. Toyabe, T, Hanajiri and T. Sugano: "Fully inverted SOI MOSFETs(III)"Proc. of 45th Fall Meeting of Applied Physics Society. II. 30a-YE-4 (1998)
K. Ikeda、T. Toyabe、T、Hanajiri 和 T. Sugano:“完全倒置 SOI MOSFET(III)”Proc。
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- 影响因子:0
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池田,鳥谷部,花尻,菅野: "全反転型SOI MOSFET"日本国特許. (1998)
Ikeda、Toriyabe、Hanajiri、Kanno:“全倒型 SOI MOSFET”日本专利(1998 年)。
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SUGANO Takuo的其他文献
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