Study on Neutron Damage Dynamics of Semiconductor Crystal

用氘核加速器的聚变中子辐照硅表面势垒探测器（Si-SBD）。探测器的泄漏电流随中子通量成比例地增大，这决定了Si-SBD的中子损伤常数。由DT和DD中子损伤常数之比确定了Si-SBD中DT和DD中子损伤的相关系数，得到了DT和DD中子损伤的相关系数为2.3。我们还利用离子输运代码TRIM-90和Si- sbd中的中子反应数据计算了Si的DT和DD中子位移损伤率。计算得到的DT和DD中子损伤相关系数与Si-SBD辐照实验结果一致。为了研究存储器ic的中子诱导软误差，用14 MeV中子辐照了几种1 Mbit CMOS SRAM ic。考虑到芯片中的细胞数量，我们得到了1 Mbit CMOS SRAM ic的中子磁化率常数，即位软截面为6-9*10^<-14> cm^2。这意味着软误差是由存储单元中有限区域的中子反应引起的。根据trimm -90编码和ENDF/B-VI中子截面数据，用蒙特卡罗程序计算得到的位软误差截面值与计算结果基本一致。

A silicon surface barrier detector (Si-SBD) was irradiated with fusion neutrons from a deuteron accelerator. The leakage current of the detector increased proportionally with neutron fluence, which determined the neutron damage constant for the Si-SBD.The correlation factor of the DT and DD neutron damage in the Si-SBD was determined from the ratio of the DT and DD neutron damage constants and was found to be 2.3. We also calculated the rate of DT and DD neutron displacement damage for Si by using the ion transport code TRIM-90 and data on neutron reactions in the Si-SBD.The correlation factor of DT and DD neutron damage from the calculation agreed with that from the Si-SBD irradiation experiment.In order to examine the neutron induced soft-error on memory ICs, several kinds of 1 Mbit CMOS SRAM ICs were irradiated with 14 MeV neutrons. Considering the cell population in the chip, we obtained the neutron susceptibility constant, i.e. bit softerror cross section of 6-9*10^<-14> cm^2 for 1 Mbit CMOS SRAM ICs. This means that a soft-error is caused by neutron reactions in a limited region in a memory cell. The bit soft-error cross section value agreed roughly with that calculated by computer simulation with a Monte Carlo program based on the TRIM-90 code and the ENDF/B-VI neutron cross section data.