Study on Neutron Damage Dynamics of Semiconductor Crystal

用氘加速器产生的聚变中子辐照硅面垒探测器（Si-SBD）。探测器的漏电流随中子注量成正比增加，从而确定了Si SBD的中子损伤常数，由DT和DD中子损伤常数的比值确定了Si SBD中DT和DD中子损伤的相关因子为2.3。利用离子输运程序TRIM-90和Si-SBD中的中子反应数据，计算了Si的DT和DD中子位移损伤率，计算得到的DT和DD中子损伤相关因子与Si-SBD辐照实验结果一致。用14 MeV中子辐照几种1 Mbit CMOS SRAM集成电路。考虑到芯片中的单元数量，我们得到了中子敏感性常数，即1 Mbit CMOS SRAM IC的位软恐怖截面为6-9*10^<-14>cm ^2。这意味着软错误是由存储器单元中的有限区域中的中子反应引起的。计算结果与利用TRIM-90程序和ENDF/B-VI中子截面数据进行的蒙特卡罗模拟计算结果基本一致。

A silicon surface barrier detector (Si-SBD) was irradiated with fusion neutrons from a deuteron accelerator. The leakage current of the detector increased proportionally with neutron fluence, which determined the neutron damage constant for the Si-SBD.The correlation factor of the DT and DD neutron damage in the Si-SBD was determined from the ratio of the DT and DD neutron damage constants and was found to be 2.3. We also calculated the rate of DT and DD neutron displacement damage for Si by using the ion transport code TRIM-90 and data on neutron reactions in the Si-SBD.The correlation factor of DT and DD neutron damage from the calculation agreed with that from the Si-SBD irradiation experiment.In order to examine the neutron induced soft-error on memory ICs, several kinds of 1 Mbit CMOS SRAM ICs were irradiated with 14 MeV neutrons. Considering the cell population in the chip, we obtained the neutron susceptibility constant, i.e. bit softerror cross section of 6-9*10^<-14> cm^2 for 1 Mbit CMOS SRAM ICs. This means that a soft-error is caused by neutron reactions in a limited region in a memory cell. The bit soft-error cross section value agreed roughly with that calculated by computer simulation with a Monte Carlo program based on the TRIM-90 code and the ENDF/B-VI neutron cross section data.