Study on Neutron Damage Dynamics of Highly Integrated Semiconductor Devices

为了研究聚变中子辐照对存储器芯片软错误的影响，采用OKTAVIAN公司生产的14 MeV中子对几种CMOS SRAM芯片进行了室温辐照，研制了一套由接口电路和计算机组成的专用装置，对辐照过程中芯片软错误翻转的模式和速率进行了现场测量。结果表明，中子反应引起的软误差不是多类而是单一类，且软误差的数量随中子注量成正比增加。对于某些类型的IC，置位（从0到1）和复位（从1到0）软错误之间的软错误翻转率也存在很大差异。考虑到芯片中的单元数量，我们得到了中子敏感性常数，即16 K和64 K位CMOS SRAM IC的位软错误截面为2- 3 × 10 ~（-2<-15>）cm ~ 2，256 K和1 Mbit IC的位软错误截面为6- 9 × 10 ~<-14>（-2）cm ~ 2。从1 Mbit样品的位软错误截面数据来看，DT中子感生的软错误似乎是由Si（n，α）Mg反应在存储单元中约5 mum × 5 mum × 500 A的临界区域引起的。此外，所有的存储单元在中子辐照后都是可控的，并且低于约10^ n/cm ^2的中子注量辐照不会造成永久性损伤<12>。

In order to examine the fusion neutron induced soft-error on memory ICs, several kinds of CMOS SRAM ICs were irradiated around room temperature with 14MeV neutrons from OKTAVIAN.A special apparatus composed of some interface circuits and a computer was developed, and the pattern and rate of soft-error upsets on the ICs were measured in- situ during neutron irradiation. It was found that neutron reaction caused not multiple but single type soft-errors and the number of the soft-errors increased proportionally with neutron fluence. There was also a large difference in the soft-error upset rate between set (from 0 to 1) and reset (from 1 to 0) soft-errors for some kinds of ICs. Considering the cell population in a chip, we obtained the neutron susceptibility constant, i.e.bit soft-error cross section of 2-3X10^<-15>cm^2 for 16K and 64K bit CMOS SRAM ICs, and 6-9X10^<-14>cm^2 for 256K and 1Mbit ICs, respectively. From the date on the bit soft-error cross section for 1Mbit samples, a DT neutron induced soft-error seems to be caused by Si(n, alpha)Mg reaction in the critical region of approximately 5mumX5mumX500A in a memory cell. Also, all memory cells were controllable after neutron irradiation and no permanent damage was caused by neutron fluence irradiation below about 10^<12>n/cm^2.