Development of Scanning Capacitance Transient Spectroscopy and Characterization of Ultrathin Oxide/Silicon Interface

在这项研究中，扫描电容瞬态光谱被开发用于获得局域态和载流子寿命的空间分布。在该方法中，可以通过扫描晶片上的非接触电极来获得电特性的晶片映射。为了验证所开发的方法的有效性，少数载流子的产生寿命的晶圆图进行了测量。采用泽布斯特方法对载流子寿命的空间分布进行非接触表征。通过与传统的泽布斯特方法的比较，发现非接触泽布斯特方法使我们能够获得与传统方法一样的载流子寿命。此外，还证明了利用扫描电容瞬态谱可以表征载流子寿命的晶片映射，并将电容-频率（C-f）方法应用于重金属污染的表征。在这项研究中，产生寿命的表征，界面陷阱，体陷阱的基础上的C-f测量进行。采用Cu掺杂和Au掺杂的样品验证了该方法的有效性，并提出了一种电容-电压（C-V）方法来分别表征SOI（Silicon-on-Insulator）晶片上氧化膜中的电荷和界面陷阱。在所提出的C-V方法中，SOI-MOS电容器的电容被测量在前栅电极和互连到背栅电极的SOI体接触之间。从SOI-MOS电容对前栅或背栅电压的依赖性估计相应的氧化物电荷和界面陷阱。

In this research, scanning capacitance transient spectroscopy was developed for obtaining a spatial distribution of localized states and carrier lifetime. In this method, a wafer mapping of electrical characteristics can be obtained by scanning a contactless electrode on a wafer. In order to demonstrate the validity of the developed method, a wafer map of generation lifetime of minority carriers were measured. Zerbst method was applied to the contactless characterization for the measurement of a spatial distribution of carrier lifetime. By comparison with conventional Zerbst method, it was found that the contactless Zerbst method enabled us to obtain carrier lifetime as well as the conventional method. Furthermore, it was demonstrated that a wafer mapping of carrier lifetime could be characterized by using scanning capacitance transient spectroscopy.Moreover, a capacitance-frequency (C-f) method was applied to the characterization of heavy metal contamination. In this study, the characterization of generation lifetime, interface traps, and bulk traps based on the C-f measurement was carried out. The validity of this method was assured with the use of Cu-doped and Au-doped samples.Also, a capacitance-voltage (C-V) method was proposed to separately characterize charges in respective oxide films and interface traps at the respective interfaces of SOI (Silicon-on-Insulator) wafer. In the proposed C-V method, a capacitance of SOI-MOS capacitor is measured between a front-gate electrode and SOI body contact interconnected to a back-gate electrode. The respective oxide charges and interface traps are estimated from dependence of SOI-MOS capacitance on a front-gate or a back-gate voltage.