Reliability and Test Solutions for Spintronic-based Compute in Memory (RESOLUTION)

点击翻译按钮获取中文摘要

Computing In Memory (CIM) is an emerging concept based on the tight integration of traditionally separated memory elements and combinational circuits, allowing minimizing time and energy needed to move data across digital architectures. In the current digital von Neumann architectures, data are transferred back and forth between the memory and the computing unit, thus making them slower and power hungry. The most promising solutions for in-memory computing architectures are based on the use of emerging technologies, such as resistive or magneto-resistive devices, that are able to act as both storage and information processing units. Despite the promising nature of the in-memory computing based architectures built with emerging devices, many issues related to the devices themselves and to their double use (storage and computing unit) have still to be solved. Modeling and characterization of fabrication defects, variability and reliability issues, fault analysis and modeling are still lacking maturity, as consequence of novel fabrication processes and variety of design proposals. These issues explain the limitations of the existing test solutions for emerging memory arrays and the lack of test strategies for in-memory computing structures thus motivating our research focus in this direction. This project aims at providing techniques for high quality test and reliability of CIM circuits and architectures based on spintronic technologies. In order to achieve this goal, the project will focus on the development of fault models, reliability improvement, characterization and test methods targeting at enhancing the dependability of the spintronic-based computing applications. The fabrication-readiness of spin transfer torque technology and our access to accurate device and failure models makes this proposed research timely, relevant and crucial.