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Performance-driven SAT- and QBF-based solutions for a modern VLSI verification, debugging and test environment

Performance-driven SAT- and QBF-based solutions for a modern VLSI verification, debugging and test environment
性能驱动的基于 SAT 和 QBF 的解决方案，适用于现代 VLSI 验证、调试和测试环境
批准号：
227044-2009
负责人：
Veneris, Andreas
金额：
$3.35万
依托单位：
University of Toronto
依托单位国家：
加拿大
项目类别：
Discovery Grants Program - Individual
财政年份：
2013
资助国家：
加拿大
项目状态：
已结题
起止时间：
2013-01-01 至 2014-12-31
来源：
https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=523888
关键词：
PerformancedrivenSATQBFbased

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Computer chips have had a tremendous impact in all aspects of science and the every day life of the modern Canadian. They support a plethora of everyday activities and facilitate experiments not previously possible. A slowdown in performance improvements could easily have a ripple effect slowing down further innovations. Today, this demand requires an increasingly complex design environment, where new standards and processes emerge to facilitate the development of the one billion transistor-count systems. For this reason, the experience of the human designer is tightly coupled with the use of automated Computer Aided Design (CAD) tools.
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