Performance-driven SAT- and QBF-based solutions for a modern VLSI verification, debugging and test environment

性能驱动的基于 SAT 和 QBF 的解决方案，适用于现代 VLSI 验证、调试和测试环境

• 批准号: 227044-2009
• 负责人: Veneris, Andreas
• 金额: $ 3.35万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2013
• 资助国家: 加拿大
• 起止时间: 2013-01-01 至 2014-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=523888
• 关键词: Performance; driven; SAT; QBF; based

Computer chips have had a tremendous impact in all aspects of science and the every day life of the modern Canadian. They support a plethora of everyday activities and facilitate experiments not previously possible. A slowdown in performance improvements could easily have a ripple effect slowing down further innovations. Today, this demand requires an increasingly complex design environment, where new standards and processes emerge to facilitate the development of the one billion transistor-count systems. For this reason, the experience of the human designer is tightly coupled with the use of automated Computer Aided Design (CAD) tools.

计算机芯片对科学的各个方面和现代加拿大人的日常生活都产生了巨大的影响。它们支持大量的日常活动，并促进以前不可能的实验。性能改进的放缓很容易产生连锁反应，减缓进一步的创新。今天，这种需求需要一个日益复杂的设计环境，新的标准和工艺出现，以促进10亿个晶体管计数系统的发展。由于这个原因，人类设计师的经验与自动化计算机辅助设计（CAD）工具的使用紧密结合在一起。