Study of Random Telegraph Noise in Ultra Small MOSFET and its Reliability

超小型MOSFET随机电报噪声及其可靠性研究

• 批准号: 01550248
• 负责人: TANIGUCHI Kenji
• 金额: $ 1.28万
• 依托单位: Osaka University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for General Scientific Research (C)
• 财政年份: 1989
• 资助国家: 日本
• 起止时间: 1989 至 1990
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-01550248/
• 关键词: MOSFET; Carrier Trap; Scaling; Random Telegraph Noise; Oxide Trap; Noise

Random telegraph noise originating from carrier trapping in ultra small MOSFETs have been measured by an automated measurement system composed of desktop computer, Picoーammeter and voltage sources. Vast number of on-off current characteristics has been accumulated into computer memory and then capture/emission time for carriers have been statistically analyzed. Noted that the random telegraph noise should be measured under the condition of low temperature fluctuation, typically less than one degree centigrade, because the change of measurement temperature causes order of magnitude difference in the average capture/emission times : derived barrier height is approximately several hundred meV. The activation energy of the capture/emission time is found to directly relate to barrier heignt associated with elastic strain originating from lattice restructuring.The analysis of the noise data reveals that the traps causing random telegraph noise locate 1 to 2 nm apart from the Si/Sio2 interfac … More e. The Coulomb repulsive range due to the trapped charge is a function of the inversion charge density because of the screening effect. In the strong inversion regime, the random telegraph noise was rarely observed. In the weak inversion condition, random telegraph noise is observed for the MOSFETs with channel width of below one tenth micrometer because the repulsive range is the order of several hundredth micrometer. Measurements at low temperature demonstrated enhanced random noise.The mechanism of interface trap generation has been investigated. Trap generation rate due to high energy electrons is function of the number of electrons colliding the interface and of their kinetic energy. Number of generated traps due to holes is found to be proportional to that of the injected holes into the oxide.In ultra small MOSFETs, carrier energy is no more unique function of electric field in the channel because of non-equilibrium carrier transport. Therefore, voltage scaling guideline should be modified from the conventional model. We proposed a new voltage scaling guideline for ultra small MOSFETs. Less

用台式计算机、皮科ー电流计和电压源组成的自动测量系统测量了超小MOSFET中载流子俘获产生的随机电报噪声。大量的开关电流特性被累积到计算机存储器中，然后对载波的捕获/发射时间进行了统计分析。注意到随机电报噪声应在低温波动的条件下测量，通常小于1摄氏度，因为测量温度的变化导致平均捕获/发射时间的数量级差异：导出的势垒高度约为数百meV。捕获/发射时间的激活能与晶格重构引起的弹性应变引起的势垒高度直接相关。对噪声数据的分析表明，引起随机电报噪声的陷阱位于距Si/SiO_2界面…1~2 nm的位置更重要的是，由于屏蔽效应，捕获电荷引起的库仑排斥范围是反转电荷密度的函数。在强逆温区，随机电报噪声很少观察到。在弱反转条件下，沟道宽度小于1/10微米的MOSFET，由于排斥范围为几百微米量级，观测到随机电报噪声。低温下的测量表明，随机噪声增强。研究了界面陷阱的产生机制。高能电子产生陷阱的速率是碰撞界面的电子个数及其动能的函数。在超小型MOSFET中，由于非平衡载流子输运，载流子能量不再是沟道中电场的唯一函数。因此，需要在传统模型的基础上对电压定标准则进行修正。我们提出了一种新的超小型MOSFET的电压调节准则。较少

项目成果

K. Taniguchi, K. Sonoda and C. Hamaguchi: "Physical Limitation of Ultra Small MOSFETs" Extended Abstracts of the 22nd Conference of Solid State Devices and Materials. 22. 825-828 (1990)

K. Taniguchi、K. Sonoda 和 C. Hamaguchi：第 22 届固态器件和材料会议的“超小型 MOSFET 的物理限制”扩展摘要。

K.Taniguchi,K.Sonoda and C.Hamaguchi: "Physical Limitation of Ultra Small MOSFETs" Proceeding of Solid State Devices and Materials. 22. 825-828 (1990)

K.Taniguchi、K.Sonoda 和 C.Hamaguchi：“超小型 MOSFET 的物理限制”固态器件和材料论文集。

H.Nakamura: "Existence of Double-Charged Oxide Traps in Submicron MOSFETs" Japanese Journal of Applied Physics. 28. L2057-2060 (1989)

H.Nakamura：“亚微米 MOSFET 中双电荷氧化物陷阱的存在”日本应用物理学杂志。

K. Taniguchi, K. Sonoda and C. Hamaguchi: ""Physical Limitation of Ultra Small MOSFETs"" Ext. Abs. of 22nd Conf. on SSMD. 22. 825-828 (1990)

K. Taniguchi、K. Sonoda 和 C. Hamaguchi：“超小型 MOSFET 的物理限制”分机。

H.Nakamura: "New Evidence for Double Charged Oxid Trap of Sulmicron MOSFETs" Extended Abstract of the 21th Conference on Solid State Devices and Materials. 21. 465-468 (1989)

H.Nakamura：“Sulmicron MOSFET 双电荷氧化陷阱的新证据”第 21 届固态器件和材料会议的扩展摘要。