STUDIES ON QUANTUM EFFECT DEVICE MODELING BASED ON DEVICE STRUCTURE AND FUNCTIONAL CIRCUITS

为了建立基于量子效应器件（如hemt和RTD器件）的功能电路设计方法，我们研究了基于物理结构的量子效应器件建模电路仿真，并设计了自顶向下大规模集成电路设计的hemt单元库。我们还设计了以高速锁相环为核心的功能电路。得到了以下结果：基于物理结构的器件建模将前人提出的基于物理结构的器件建模应用到电路仿真模型中。结果表明，该方法适用于电路仿真。为了使器件结构更加多样化，引入了器件模拟器。建立了利用器件仿真估计器件特性和电路模型的方法。研究了采用rtd / hemt堆叠结构的多基元栅极功能电路。与传统的DCFL门相比，Rtd / hemt门具有更高的速度和更低的功耗特性。设计了一种具有快速拉入特性的三模锁相环，采用0.3 μ m的hemt技术进行了设计和仿真。结果表明，所设计的锁相环在1v直流电源下工作频率可达2.2 GHZ。针对hemt动态电路实现更高的速度和更低的功耗，利用cmos技术进行了初步的研究。采用量子效应器件进行自顶向下设计，采用hemt器件进行自顶向下集成电路设计，设计了与功能cmos芯片库相对应的芯片库。电池库有49个基本电池，电源电压为1v。利用该单元库设计了verilog-hdl测试电路，并进行了验证。建立了与传统cmos向下设计相兼容的基本设计环境。

IN ORDER TO ESTABLISH DESIGN METHDOLOGY OF FUNCTIONAL CIRCUITS USING QUANTUM EFFCT DEVICES SUCH AS HEMT AND RTD DEVICES,WE HAVE STUDIED QUANYUM EFFECT DEVICE MODELING FOR CIRCUIT SIMULATION BASED ON PHYSICAL STRUCTURE,AND DESIGNED HEMT CELL LIBRARY FOR TOP-DOWN LSI DESIGN.AND WE HAVE ALSO DESIGNED FUNCTIONAL CIRCUITS FOCUSED ON HIGH-SPEED PLL.THE FOLLOWING RESULTS ARE OBTAINED.1.PHYSICAL STRUCTURE BASED DEVICE MODELINGTHE DEVICE MODELING BASED ON PHYSICAL STRUCTURE PREVIOUSLY PROPOSED BY THE INVESTIGATORS ARE APPLIED TO CIRCUIT SIMULATION MODEL.THE RESULTS SHOW THAT IT IS APPLICAPABLE TO CIRCUIT SIMULATION.FOR MORE WIDE VARIETY OF DEVICE STRUCTURE,DEVICE SIMULATOR IS INTRODUCED.THE METHOD TO ESTIMATE DEVICE CHARACTERISTICS AND CIRCUIT MODEL WITH DEVICE SIMULATION IS ESTABLISHED.2.FUNCTIONAL CIRCUITS FOR PLLPRIMITIVE GATES USING RTD/HEMT STACK STRUCTURE ARE INVESTIGATED.RTD/HEMT GATES HAVE HIGHER SPEED AND LOWER POWER CONSUMPTION CHARACTERISTICS COMPARED WITH CONVENTIONAL DCFL GATES.AND A 3-MODE PLL WHICH HAS FAST PULL-IN CHARACTERISTICS IS DESIGNED IN 0.3UM HEMT TECHNOLOGY IS DESIGNED AND SIMULATED.IT IS CONFIRMED THAT THE DESIGNED PLL CAN OPERATE UP TO 2.2 GHZ AT 1V DC POWER SUPPLY.AIMING ACHIEVE HIGHER SPEED AND LOWER POWER BY HEMT DYNAMIC CIRCUITS,PRELIMINARY INVESTIGATION ARE CARRIED OUT BY CMOS TECHNOLOGY.3.TOP-DOWN DESIGN USING QUANTUM EFFECT DEVICESFOR TOP-DOWN LSI DESIGN USING HEMT DEVICE,CELL LIBRARY CORRESPONDING TO FUNCTIONAL CMOS CELL LIBRARY IS DESIGNED.THE CELL LIBRARY HAS 49 BASIC CELLS WITH 1V POWER SUPPLY VOLTAGE.USING THIS CELL LIBRARY TEST CIRCUITS ARE DESIGNED BY VERILOG-HDL AND CONFIRMED.BASIC DESIGN ENVIRONMENT COMPATIBLE WITH CONVENTIONAL CMOS TO-DOWN DESIGN IS ESTABLISHED FOR HEMT LSI.