A New Functional MOS Transistor Featuring Neuron Functions
一种具有神经元功能的新型功能 MOS 晶体管
基本信息
- 批准号:02402032
- 负责人:
- 金额:$ 8.64万
- 依托单位:
- 依托单位国家:日本
- 项目类别:Grant-in-Aid for General Scientific Research (A)
- 财政年份:1990
- 资助国家:日本
- 起止时间:1990 至 1991
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
A new functional MOS transistor has been developed which works more intelligently than a mere switching device. The functional transistor calculates weighted sum of all input signals at the gate level, and controls the "on" and "off" of the transistor based on the result of such a weighted sum operation. Since the function is quite analogous to that of biological neurons, the device is named a neuron MOSFET or neuMOS (nuMOS) in short. The device is composed of a floating gate and plural of input gates that are capacitively interacting with the floating gate. As the gate-level sum operation is perfomied in a voltage mode utilizing the capacitive coupling effect, essentially no power dissipation occurs in the calculation, making the device ideal for ULSI implementation. The basic characteristics of neuron MOSFET's as well as of simple circuit blocks are analyzed based on a simple transistor model and experiments. Making use of its very powerful function, a number of interesting circuit a … More pplications have been explored. neuMOS inverters and neuron circuits, variable threshold transistors and inverters, linear resistors, and neuMOS source follower circuits and single gate D/A converters are described. The concept of a Soft Hardware Logic Circuit implemented by neuMOS transistors has been also developed. The circuit exhibits a very interesting feature that the logical function of the circuit is arbitrarily altered by external signals without any changes in the hardware configuration. When fixed function logic circuits are implemented by nuMOS transistors, the number of transistors as well as of interconnections can be dramatically reduced as compared to their conventional CMOS-design counterparts. 4-bit flash A/D converter, for instance, can be constructed by only 28 transistors although 398 transistors are required in conventional design. Basic operations of these circuits have been experinientally verified by fabricating test circuits using double polysilicon CMOS process. Less
一种新的功能MOS晶体管已经开发出来,它比单纯的开关器件工作得更智能。功能晶体管计算所有输入信号在栅极电平的加权和,并基于这种加权和运算的结果控制晶体管的“导通”和“截止”。由于其功能与生物神经元的功能非常相似,因此该器件被命名为神经元MOSFET或neuMOS(nuMOS)。该器件由浮置栅极和与浮置栅极电容性相互作用的多个输入栅极组成。由于门级求和操作是在电压模式下利用电容耦合效应执行的,因此计算中基本上没有功耗,使该器件成为ULSI实现的理想选择。基于简单的晶体管模型和实验,分析了神经元MOSFET的基本特性以及简单电路模块的基本特性。利用其强大的功能,设计了一些有趣的电路, ...更多信息 已经探索了应用。描述了neuMOS反相器和神经元电路、可变阈值晶体管和反相器、线性电阻器、neuMOS源极跟随器电路和单栅极D/A转换器。还开发了由neuMOS晶体管实现的软硬件逻辑电路的概念。该电路表现出一个非常有趣的功能,即电路的逻辑功能可以由外部信号任意改变,而无需改变硬件配置。当固定功能逻辑电路由nuMOS晶体管实现时,与其常规CMOS设计对应物相比,晶体管的数量以及互连的数量可以显著减少。4-例如,尽管在传统设计中需要398个晶体管,但是位快速A/D转换器可以仅由28个晶体管构成。这些电路的基本操作已经通过使用双多晶硅CMOS工艺制作测试电路进行了实验验证。少
项目成果
期刊论文数量(17)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
T,Shibata: "An Intelligent MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations" Technical Digest,International Electron Devicas Meeting 1991,Washington D.C.919-922 (1991)
T,Shibata:“具有门级加权和和阈值操作的智能 MOS 晶体管”技术文摘,1991 年国际电子设备会议,华盛顿特区 919-922 (1991)
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
T. Shibata and T. Ohmi: "A new-concept transistor realizing neuron functions by a single device" Nikkei Microdevices. 79. (1992)
T. Shibata 和 T. Ohmi:“通过单个器件实现神经元功能的新概念晶体管”Nikkei Microdevices。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
T. Shibata and T. Ohmi: "An intelligent MOS transistor featuring gate-level weighted-sum and threshold operations" Technical Digest, International Electron Devices Meeting 1991, Washington D. C.919-922 (1991)
T. Shibata 和 T. Ohmi:“具有门级加权和和阈值操作的智能 MOS 晶体管”技术文摘,1991 年国际电子器件会议,华盛顿特区 C.919-922 (1991)
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
T.Shibata: "An Intelligent MOS Transistor Featuring GateーLevel Weighted Sum and Threshold Operations" Technical Digest,International Electron Devices Meeting 1991,Washington D.C. 919-922 (1991)
T. Shibata:“具有门级加权和和阈值操作的智能 MOS 晶体管”技术文摘,1991 年国际电子器件会议,华盛顿特区 919-922 (1991)
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
T.Shibata: "A New Logic Circuit Design Using Neuron MOSFET'S" IEEE SolidーState Circuits.
T. Shibata:“使用神经元 MOSFET 的新逻辑电路设计”IEEE 固态电路。
- DOI:
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- 影响因子:0
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SHIBATA Tadashi其他文献
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A Psychologically-Inspired VLSI Brain Model System Implementing Subconscious Information Processing Based on Analog/Digital Marged Computation
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An Intelligent Image-Recognition VLSI System Employing Neuron-MOS Feature Extracting Circuitry
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A NEURON-MOS NEURAL NETWORK FEATURING ON-CHIP SELF-LEARNING CAPABILITY
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NEW LOGIC LSI'S HAVING SOFT HARDWARE CONFIGURATION
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