An Intelligent Image-Recognition VLSI System Employing Neuron-MOS Feature Extracting Circuitry

采用Neuron-MOS特征提取电路的智能图像识别VLSI系统

• 批准号: 11305024
• 负责人: SHIBATA Tadashi
• 金额: $ 23.56万
• 依托单位: The University of Tokyo
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (A)
• 财政年份: 1999
• 资助国家: 日本
• 起止时间: 1999 至 2001
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-11305024/
• 关键词: VLSI; Associative processor; Image recognition; Medical radiograph analysis; Brain computing; Psychological brain model; Analog VLSI; Ferroelectric memory; 連想処理; CMOS VLSI; Zoom Lens Metaphor; 低消費電力; 多重解像度; 手書き文字認識; 集積回路; 医用X線写真解析; CMOS

Despite the phenomenal advancement in the digital computer technology, human-like intelligent information processing is not yet possible. In this project, we have aimed at building a human-like flexible image recognition system using the state-of-the-art silicon technology based upon the "Psychological VLSI Brain Model" proposed by the head investigator. Taking the medical X-ray picture diagnosis as a test vehicle, we have succeeded in developing an intelligent image recognition algorithm, demonstrating the diagnostic results approved by experts having more than 10 years of experience in a university hospital. Furthermore, the real-time response capability of such systems has been shown by developing VLSI chips dedicated to associative image processing. As a result, we have established a solid foundation on which we can build a real-time-response low-power human-like-brain-computing VLSI system in the future research project.In perceiving and understanding something, recalling the past … More experience most relevant to the current event is occurring in our brains as the most basic processing. Being inspired by such a psychological brain model, we have developed the maximum-likelihood-search VLSI engine, which we call associative processors. Various types of high-performance associative processor chips have been developed using both digital and analog CMOS technologies to meet varying needs. Among them, we have developed a ferroelectric associative memory for the first time as a candidate for use in mobile applications.The most important achievement in the project is the invention of a new image representation algorithm called PPED (projected Principal-Edge Distribution), which has enabled us to carry out robust image recognition using the associative processors. The algorithm bases on the extraction of most primitive features in the image (which we called "piclet") by a dedicated VLSI chip to form feature vectors. The PPED representation very well preserves the human perception of similarity among images in the vector space while achieving the substantial dimensionality reduction in the image data, thus providing the most favorable feature for hardware recognition systems using associative processors. Less

尽管数字计算机技术取得了惊人的进步，但像人类一样的智能信息处理尚不可能。在这个项目中，我们的目标是基于首席研究员提出的“心理VLSI大脑模型”，利用最先进的硅技术构建一个类似人类的灵活图像识别系统。我们以医用x线图像诊断为试验载体，成功开发了智能图像识别算法，展示了具有10年以上大学医院经验的专家认可的诊断结果。此外，这种系统的实时响应能力已经通过开发专用于关联图像处理的VLSI芯片得到了证明。因此，我们为在未来的研究项目中构建实时响应的低功耗类人脑计算VLSI系统奠定了坚实的基础。在感知和理解事物的过程中，在回忆过去的过程中，更多与当前事件最相关的经验在我们的大脑中作为最基本的处理过程发生。受这种心理大脑模型的启发，我们开发了最大似然搜索VLSI引擎，我们称之为关联处理器。利用数字和模拟CMOS技术开发了各种类型的高性能联想处理器芯片，以满足不同的需求。其中，我们首次开发了一种铁电联想存储器，作为移动应用的候选材料。该项目最重要的成就是发明了一种新的图像表示算法，称为ped（投影主边缘分布），它使我们能够使用关联处理器进行鲁棒图像识别。该算法基于通过专用VLSI芯片提取图像中大多数原始特征（我们称之为“piclet”）来形成特征向量。在实现图像数据的大量降维的同时，极好地保留了人类对向量空间中图像之间相似性的感知，从而为使用关联处理器的硬件识别系统提供了最有利的特征。少

项目成果

Huaiyu Xu: "Optimizing Vector-Quantization Processor Architecture for Intelligent Query Search Applications"Japanese Journal of Applied Physics. Vol.41. 2295-2300 (2002)

徐怀宇：“优化智能查询搜索应用的矢量量化处理器架构”日本应用物理学杂志。

M. Yagi, M. Adachi, and T. Shibata: "A Hardware-Friendly Soft-Computing Algorithm for Image Recognition"Proceedings of 10^<th> European Signal Processing Conference (EUSIPCO 2000(Tampere, Finland, Sept.4-8). 729-732 (2000)

M. Yagi、M. Adachi 和 T. Shibata：“用于图像识别的硬件友好型软计算算法”第 10 届欧洲信号处理会议 (EUSIPCO 2000)（芬兰坦佩雷，9 月 4-8 日）论文集

Makoto Ogawa and Tadashi Shibata: "NMOS-based Gaussian-Element-Matching Analog Associative Memory"Proceedings of the 27^<th> European Solid-State Circuits Conference (ESSCIRC 2001), Ed. by F. Dielacher and H. Grunbacher((Frontier Group), Villach, Austria,

Makoto Okawa 和 Tadashi Shibata：“基于 NMOS 的高斯元素匹配模拟关联存储器”第 27 届欧洲固态电路会议论文集 (ESSCIRC 2001)，编辑。

Kiyoto Ito, Makoto Ogawa, and Tadashi Shibata: "A High-Performance Time-Domain Winner-Take-All Circuit Employing OR-Tree Architecture"Extended Abstracts, the 2001 International Conference on Solid State Devices and Materials (SSDM 2001)(Tokyo, September 2

Kiyoto Ito、Makoto Okawa 和 Tadashi Shibata：“采用 OR 树架构的高性能时域赢家通吃电路”扩展摘要，2001 年国际固态器件和材料会议 (SSDM 2001)（东京，

S. Nomura and T. Shibata: "Pure-Capacitance-Load Source-Follower Comparators for Low-Power Winner-Take-All Circuitry"Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002)(Arizona, May 26-29). III-759-III-762 (2002)

S. Nomura 和 T. Shibata：“低功耗赢家通吃电路的纯电容负载源跟随比较器”2002 年 IEEE 国际电路与系统研讨会 (ISCAS 2002) 会议记录（亚利桑那州，5 月 26-29 日）