Research on a Reconfigurable Parallel Computer

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The purpose of this research is to improve the performance of a parallel computer by narrowing the gap between the logical structure of problems and the physical hardware structure. The prototype computer called KRPP, has been built. The main results of the research are the following :1. Reconfigurable interconnection networkKRPP consists of 128 SPARC microprocessors (PEs) which are connected by a crossbar network. In order to control the network, two basic modes demand and preset modes, . are prepared. These wde provide reconfigurability by which the network structure can be tailored to a wide range of applications. A network synthesis compiler is also developed.2. Element processorKRPP employs a NUMA memory architecture. In order to assure cache coherence for inter PEs and intra PE, a directory based cache coherence protocol and a scheme based on the reverse translation buffer method are implemented.3. Basic softwareA parallel programming language which is an extension of C language and a parallel operating system are also developed. The OS is particularly suited to a tightly coupled multiprocessor and has many features : The OS kernel function itself can be performed in parallel and a high-speed processor allocation mechanism for multiple threads is provided.