Implementation of a High-Performance Multiple-Valued Current-Mode VLSI System with Low-Power and Highly Reliable Capabilities

具有低功耗和高可靠性功能的高性能多值电流模式 VLSI 系统的实现

• 批准号: 12680324
• 负责人: HANYU Takahiro
• 金额: $ 2.37万
• 依托单位: Tohoku University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2000
• 资助国家: 日本
• 起止时间: 2000 至 2002
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-12680324/
• 关键词: Multiple-Valued Current-Mode Circuit; Differential-Pair Circuit; Current-Mirror-less Circuit; Current-Mode Comparator; Output Generator; Current-Mode Linear Sum; Current-to-Voltage Converter; Dual-Rail Current-Mode Circuit; 多値2線式符号; セルフチェッキング回路 /

Low-power circuit design while maintaining a high-speed capability is needed not only for battery-powered portable applications but also to reduce the power dissipation of dedicated apecial-purpose VLSI processors, because the extra current density in interconnections causes temporal or permanent malfunction due to voltage drops or electromigrations. Multiple-valued current-mode (MVCM) integrated circuits have a potential advantage to reduce the wiring complexity and the nurnber of active devices in arithmetic large-scale-integration chips because the frequently used linear sum operation can be performed simply by wiring with no active devices. However, the switching speed in the MVCM circuit is relatively slow, and its power dissipation due to the steady current becomes high because current-sources in differential-pair circuits always flow a constant current in the active mode. In this project, a new MVCM circuit based on dual-rail differential logic has been proposed for high-speed, … More low-power, highly reliable arithmetic-oriented VLSI. A differential logic-style circuit has an attractive feature that its input voltage swing is small enough while maintaining a high currentdriving capability. The combination of the differential logic style and MVCM circuitry in arithmetic VLSI makes it possible to improve the switching speed compared with that of a corresponding binary CMOS implementation. Moreover, the use of a precharge-evaluate logic style abo makes the steady current flow cut off, which results in great reduction of dynamic power dissipation. A judicious combination of differential logic, MVCM logic and dynamic logic in the proposed circuit makes it possible to reduce the power dissipation together with device and interconnection counts while maintaining a high-speed switching capability. The use of dual-rail coding, which is used in differential logic-style circuit, is a widely used encoding style of asynchronous and self-checking circuit implementation. From this point of view, we have also proposed high-performance asynchronous and self-checking circuit using multiple-valued dual-rail complementary signals. Less

在保持高速能力的同时，低功耗电路设计不仅适用于电池供电的便携式应用，而且还需要降低专用VLSI处理器的功耗，因为互连中的额外电流密度会由于电压下降或电迁移而导致暂时性或永久性故障。在算术大规模集成芯片中，多值电流模式(MVCM)集成电路在降低布线复杂度和减少有源器件个数方面具有潜在的优势，因为常用的线性求和运算可以通过简单的布线来实现，而不需要有源器件。然而，MVCM电路中的开关速度相对较慢，由于差分对电路中的电流源总是在有源模式下流动恒定的电流，因此由于稳态电流而导致的功率消耗变得很大。本课题针对高速…的特点，提出了一种基于双轨差分逻辑的MVCM电路更低功耗、高可靠性、面向算术的VLSI。差分逻辑式电路的一个吸引人的特点是，它的输入电压摆幅足够小，同时保持高电流驱动能力。将差分逻辑风格与算术VLSI中的MVCM电路相结合，使得与相应的二进制CMOS实现相比，提高了开关速度。此外，预充电评估逻辑ABO的使用使得稳态电流被切断，从而极大地降低了动态功耗。在所提出的电路中，合理地结合了差分逻辑、MVCM逻辑和动态逻辑，使得在保持高速开关能力的同时降低了功耗以及器件和互连计数。双轨编码用于差分逻辑式电路，是一种广泛使用的异步和自检电路实现的编码方式。从这个角度出发，我们还提出了采用多值双轨互补信号的高性能异步自检电路。较少

项目成果

羽生貴弘: "2色2線式電流モード多値非同期VLSIシステムとその応用"電子情報通信学会技術研究報告. 100・30. 9-15 (2000)

Takahiro Hanyu：“双色两线电流模式多级异步VLSI系统及其应用”IEICE技术报告100・30（2000）。

T.Hanyu: "Multiple-Valued Mask-Programmable Logic Array Using One-Transistor Universal-Literal Circuits"Proc.of 31^<st> IEEE International Symposium on Multiple-valued Logic. (to be published). (2001)

T.Hanyu：“使用单晶体管通用文字电路的多值掩模可编程逻辑阵列”Proc.of 31^<st> IEEE 国际多值逻辑研讨会。

山口通智、羽生貴弘、亀山充隆: "適応的電源電圧制御に基づく低消費電力VLSIアーキテクチャ"2002年電子情報通信学会全国大会予稿集. (発表予定). (2002)

Michitomo Yamaguchi、Takahiro Hanyu、Mitsutaka Kameyama：“基于自适应电源电压控制的低功耗 VLSI 架构”2002 年 IEICE 全国会议论文集（待发表）。

T.Ike, T.Hanyu, M.Kameyama: "Fully source-coupled logic based multiple-valued VLSI"Proc. of 32nd IEEE International Symposium on Multiple-Valued Logic. 32(掲載決定). (2002)

T.Ike、T.Hanyu、M.Kameyama：“基于全源耦合逻辑的多值 VLSI”第 32 届 IEEE 国际多值逻辑研讨会论文集（2002 年）。

羽生貴弘: "2色2線式電流モード多値非同期VLSIシステムとその応用"電子情報通信学会技術研究報告. FTS2000・2. 9-15 (2000)

Takahiro Hanyu：“双色两线电流模式多级异步VLSI系统及其应用”IEICE技术研究报告FTS2000・2.9-15（2000）。