MULTIPLE-VALUED PROCESSOR FOR INTELLIGENT INTEGRATED SYSTEM

智能集成系统多值处理器

• 批准号: 09044125
• 负责人: HANYU Takahiro
• 金额: $ 1.98万
• 依托单位: TOHOKU UNIVERSITY
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for international Scientific Research
• 财政年份: 1997
• 资助国家: 日本
• 起止时间: 1997 至 1998
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-09044125/
• 关键词: Multiple-valued content-addressable memory (CAM); Floating-gate-MOS pass-transistor network; Threshold operation; Logic-in-memory VLSI architecture; Non-numeric data processing; Fully parallel processing; Magnitude comparison; Intelligent informati

Real-world applications need to achieve very quick response for dynamically changing real-world environment. Therefore, it is very important to develop a "Super Chip for Intelligent Integrated Systems." The emerging technologies of intelligent integrated systems for real-world applications rely increasingly on VLSI processors high degree of parallelism in various levels such as architectural, logic design, and circuit/device level. The following items are the themes discussed in this project : (1)Discussion about algorithm/system/architecture-level innovation : We have discussed about the efficiency of multiple-valued logic-in-memory VLSI as the development of fully parallel image processor for intelligent integrated systems. The basic idea of the multiple-valued logic-in-memory VLSI architecture is that the data which are frequently used in the communication between the processing element (PE) and the memory are stored into the local memory tightly connected to the PE.We also discussed about the efficiency of some concrete examples using such concept.(2)Discussion about logic-design/circuit-design-level innovation : We have presented a floating-gate-MOS pass-transistor network as a circuit-level logic-in-memory VLSI architecture. We have discussed about the usefulness of such a new pass-transistor network and about its application areas. While a floating-gate MOS transistor is used as a multiple-valued storage element in the present VLSI system, some logical functions such as a threshold function and a pass-switch function are merged into the multiple-valued memory plane.(3)Discussion about device/process-technology-level innovation : We have also discussed about the device technologies to realize the floating-gate-MOS pass-transistor network.

现实世界的应用程序需要实现对动态变化的现实世界环境的快速响应。因此，研制“智能集成系统超级芯片”具有重要意义。“用于实际应用的智能集成系统的新兴技术越来越依赖于超大规模集成电路处理器，这些处理器在各个级别（如架构、逻辑设计和电路/设备级别）具有高度并行性。（1）关于算法/系统/体系结构级创新的讨论：我们讨论了多值逻辑存储器VLSI的效率，作为智能集成系统的全并行图像处理器的发展。多值逻辑存储器VLSI结构的基本思想是将处理单元（PE）与存储器之间通信中经常使用的数据存储到与PE紧密相连的局部存储器中，并讨论了使用这种思想的一些具体例子的效率。（2）关于逻辑设计/电路设计级创新的讨论：我们提出了浮栅MOS传输晶体管网络作为电路级逻辑存储器VLSI结构。我们已经讨论了这种新的传输晶体管网络的有用性及其应用领域。虽然浮栅MOS晶体管被用作当前VLSI系统中的多值存储元件，但是诸如阈值功能和传输开关功能的一些逻辑功能被合并到多值存储器平面中。（3）器件/工艺技术水平创新的讨论：我们还讨论了实现浮栅MOS传输晶体管网络的器件技术。

项目成果

羽生貴弘: "2線式電流モード多値集積回路を用いた非同期プロセッサの構成" 電子情報通信学会集積回路研究会技術報告. ICD97-228. 1-8 (1998)

Takahiro Hanyu：“使用两线电流模式多层集成电路的异步处理器的配置”电子、信息和通信工程师协会集成电路研究组的技术报告 ICD97-228 (1998)。

齋藤敬弘: "電流モードディープサブミクロン多値集積回路の最適設計とその応用" 電子情報通信学会和文論文誌D-I. J81-D-I,2. 157-164 (1998)

Takahiro Saito：“电流模式深亚微米多层集成电路的优化设计及其应用”IEICE 日本期刊 D-I，2. 157-164 (1998)

T.Hanyu: "Non-Volatile One-Transistor-Cell Multiple-Valued CAM with a Digit-Parallel- Access Scheme and Its Applications" Computers Elect.Eng.23,6. 407-414 (1997)

T.Hanyu：“采用数字并行访问方案的非易失性单晶体管单元多值 CAM 及其应用”Computers Elect.Eng.23,6。

T.Hanyu: "One-Transistor-Cell 4-Valued Universal-Literal CAM for Cellular Logic Image Processing" Proc.of 1997 IEEE International Symposium on Multiple-Valued Logic. 27. 175-180 (1997)

T.Hanyu：“用于细胞逻辑图像处理的单晶体管单元 4 值通用文字 CAM”1997 年 IEEE 国际多值逻辑研讨会论文集。

H.Kimura: "Miltiple-Valued Contnet-Addressable Memory VLSI Using Ferroelectric Capacitors" MVL Technical Report of IEICE. MVL-99. 53--60 (1999)

H.Kimura：“使用铁电电容器的多值连续网络可寻址存储器 VLSI”IEICE 的 MVL 技术报告。