Studies on High-Level Synthesis for Testability Based on Combinational Test Generation Complexity

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This work proposed a class of partial thru testable sequential circuits.The class is a sub-class of acyclically sequential ones, and properly includes a class of full thru testable sequential ones. This work also proposed an efficient method for generating test sets for partial thru sequential circuits, and an algorithm for designing partial thrutestable sequential circuits. The result of this work contributes to the reduction in hardware overhead for testability compared with the conventional full scan design with keeping complete fault efficiency.