VLSI CIRCUIT DESIGNS with SOFT ERROR TOLERANCE

软误差（SEs）是由宇宙射线中的中子或包装材料中的α粒子引起的辐射诱导的跃迁脉冲。本研究得到了两类结果：(a)具有SE容限特性的VLSI电路设计，(b)具有SE容限电路的测试生成和易于测试的设计。在(a)中，电路设计屏蔽了组合电路部件中产生的SE脉冲，并提出了SE硬化锁存器或触发器的电路设计。在(b)中，提出了具有SE容差特性的易于测试的延迟故障扫描结构。

Soft errors (SEs) are radiation-induced transition pulses caused by neutrons from cosmic rays or alpha particles from packaging material. This research got the two type results of (a) VLSI circuit design with the property of SE tolerance, and (b) test generation and easily testable design for SE tolerant circuits. In (a), circuit design masking SE pulses caused in combinational circuit parts, and circuit designs for SE hardened latch or flip-flop have been proposed. In (b), easily testable scan structure for delay faults with the property of SE tolerance has been proposed.