Scaling extreme analYtics with Cross-architecture acceleration based on OPen Standards

人工智能和分析的广泛采用导致了对新型硬件加速器的快速扩展市场，这些加速器可以在云和边缘提供高能效的培训和推理任务扩展。不幸的是，今天所有流行的解决方案AI加速解决方案都使用专有的、封闭的硬件-软件堆栈，导致AI加速市场被少数大型行业参与者垄断。SYCLOPS项目的愿景是通过使用开放标准实现人工智能加速民主化，并为欧洲和其他地区建立一个健康、竞争、创新驱动的生态系统，从而为极大和多样化的数据提供更好的人工智能/数据挖掘解决方案。这一愿景依赖于业界两个重要趋势的融合：(I)用于人工智能和分析加速的免费、开放指令集体系结构(ISA)RISCV的标准化和采用，以及(Ii)SYCL作为一种跨供应商、跨体系结构的数据并行编程模型的出现和发展，适用于所有类型的加速器，包括RISC-V。SYCLOPS项目的目标是首次将这些标准结合在一起，以便(I)使用基于标准的、完全开放的AI加速方法展示极端数据分析在性能和可扩展性方面的突破性进展，以及(Ii)支持可互操作(开放和供应商中立的接口/API)、可信任(可验证和基于标准的硬件/软件)和绿色(通过特定应用处理器定制)AI系统的开发。为此，我们将利用在SYCLOPS中获得的经验，为SYCL和RISC-V标准做出贡献，并促进与各自的学术、工业和创新者社区(RISC-V基金会、EPI、Khronos、ISO C++)的联系。将这两个标准结合在一起可以实现两种标准的协同设计，这反过来又将使人工智能加速器设计空间更加广阔，解决方案生态系统更加丰富。

The wide-spread adoption of AI and analytics has resulted in a rapidly expanding market for novel hardware accelerators that can provide energy-efficient scaling of training and inference tasks at both the cloud and edge. Unfortunately, all popular solutions AI acceleration solutions today use proprietary, closed hardware—software stacks, leading to a monopolization of the AI acceleration market by a few large industry players. The vision of SYCLOPS project is to enable better solutions for AI/data mining for extremely large and diverse data by democratizing AI acceleration using open standards, and enabling a healthy, competitive, innovation-driven ecosystem for Europe and beyond. This vision relies on the convergence of two important trends in the industry: (i) the standardization and adoption of RISCV, a free, open Instruction Set Architecture (ISA), for AI and analytics acceleration, and (ii) the emergence and growth of SYCL as a cross-vendor, cross-architecture, data parallel programming model for all types of accelerators, including RISC-V. The goal of project SYCLOPS is to bring together these standards for the first time in order to (i) demonstrate ground-breaking advances in performance and scalability of extreme data analytics using a standards-based, fully-open, AI acceleration approach and (ii) enable the development of inter-operable (open and vendor neutral interfaces/APIs), trustworthy (verifiable and standards-based hardware/software), and green (via application-specific processor customization) AI systems. In doing so, we will use the experience gained in SYCLOPS to contribute back to SYCL and RISC-V standards and foster links to respective academic, industrial and innovator communities (RISC-V foundation, EPI, Khronos, ISO C++). Bringing together the two standards enables codesign in both standards, which in turn, will enable a broader AI accelerator design space, and a richer ecosystem of solutions.