Application Customisation: Enhancing Design Quality and Developer Productivity
应用程序定制:提高设计质量和开发人员生产力
基本信息
- 批准号:EP/P010040/1
- 负责人:
- 金额:$ 160.98万
- 依托单位:
- 依托单位国家:英国
- 项目类别:Research Grant
- 财政年份:2017
- 资助国家:英国
- 起止时间:2017 至 无数据
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
There have not been many shake-ups in mainstream processor architectures, since von Neumann articulated their basic principles in 1945 and Hoff developed the microprocessor architecture in 1969. This is changing: field programmable technology has been adopted by major companies such as Microsoft and Intel for datacentre computing, and new architectures are expected which integrate processor cores and field programmable resources on the same chip. These developments are largely motivated by improvements in performance and energy efficiency of field programmable technology, which are so promising that industrial adoption takes place despite the significant challenge of developing applications for custom computing systems based on field programmable technology.Our vision is to address this challenge by advancing the foundation and applications of customisation, which involves developing hardware and software to fit design requirements. The proposed Platform project aims to pioneer new capabilities for enhancing design quality and designer productivity of custom computing systems, with potential to revolutionise many applications including those with needs for big data processing or for improved reliability and security. It builds on success of disruptive research funded by our previous Platform (EP/I012036/1).An example of such success is research in runtime reconfiguration of custom computing systems: we developed new analysis methods to enable reconfiguration to remove idle functions; we showed how reconfiguration can benefit many applications such as genomic data processing and finite-difference computation. Our work is disruptive since, in contrast to current focus on partial reconfiguration, it demonstrates that full reconfiguration can provide significant energy-efficient acceleration over conventional multicore and manycore processors reducing, for example, runtime of Bisulfite sequence alignment from hours to minutes for non-invasive prenatal and cancer diagnosis. Moreover, we invented the first field programmable architecture capable of single-cycle on-chip configuration generation, while current commercial devices are based on off-chip configuration generation that can take hours. Such exciting progress is only possible because the Platform Grant enabled high-risk research by researchers who would otherwise suffer from funding gaps: 12 Research Associates in our team enjoyed Platform support before they found permanent positions. Renewed Platform support will allow continuing development of our dynamic and ambitious research team to explore next-generation computer systems and their applications.The flexibility of the renewed Platform Grant will be used to address three new strategic areas, on which we are uniquely capable of making major impacts; we will conduct exploratory research to identify promising projects for responsive mode or other forms of funding:1. Multi-level tradeoff-aware design automation, which includes investigating customisation strategies and the associated tradeoffs, automation of effective customisation strategies, and developing reusable demonstration facilities and testbeds.2. Reconfigurable big data and cloud architectures, which include customisable big data processing, runtime design generation and optimisation, and domain-specific cloud optimisation.3. Reliable system development life cycle, which includes codesign of reliable and resilient systems, high-coverage testing and verification strategies, and reliability and resilience life cycle management.The added-value aspects for this Platform Grant proposal include: (a) ensuring a critical mass of researchers in key areas, (b) exploring significant strategic areas, (c) contributing to research infrastructure, (d) attracting fresh talents, (e) pioneering and strengthening international collaborations, and (f) accelerating technology transfer.
自从冯·诺依曼在1945年阐述了它们的基本原理,霍夫在1969年开发了微处理器架构以来,主流处理器架构并没有发生太多的变化。这种情况正在改变:现场可编程技术已经被诸如微软和英特尔的大公司采用用于中心计算,并且期望将处理器核心和现场可编程资源集成在同一芯片上的新体系结构。这些发展的动力主要来自于现场可编程技术在性能和能效方面的改进。尽管为基于现场可编程技术的定制计算系统开发应用程序面临巨大挑战,但现场可编程技术的前景如此光明,以至于工业应用得以实现。我们的愿景是通过推进定制的基础和应用程序来应对这一挑战,其涉及开发硬件和软件以适应设计要求。拟议的平台项目旨在开拓新的能力,以提高定制计算系统的设计质量和设计人员的生产力,并有可能彻底改变许多应用程序,包括那些需要大数据处理或提高可靠性和安全性的应用程序。它建立在我们以前的平台(EP/I 012036/1)资助的颠覆性研究的成功基础上。这种成功的一个例子是定制计算系统的运行时重构研究:我们开发了新的分析方法,使重构能够删除空闲功能;我们展示了重构如何使许多应用受益,如基因组数据处理和有限差分计算。我们的工作是破坏性的,因为与目前专注于部分重新配置相比,它表明完全重新配置可以提供比传统多核和众核处理器显著的节能加速,例如,将亚硫酸氢盐序列比对的运行时间从几小时减少到几分钟,用于非侵入性产前和癌症诊断。此外,我们发明了第一个能够单周期生成片上配置的现场可编程架构,而目前的商业设备是基于片外配置生成的,可能需要数小时。这种令人兴奋的进展是唯一可能的,因为平台赠款使高风险研究的研究人员谁否则将遭受资金缺口:12研究助理在我们的团队享受平台的支持之前,他们找到了永久性的职位。新的平台资助计划可让我们的研究团队继续发展,以探索新一代计算机系统及其应用。新的平台资助计划可灵活运用于三个新的策略范畴,而我们在这三个范畴有独特能力发挥重大影响。多层次权衡感知设计自动化,包括调查定制策略和相关权衡、有效定制策略的自动化以及开发可重复使用的演示设施和测试台。2.可重新配置的大数据和云架构,包括可定制的大数据处理、运行时设计生成和优化以及特定领域的云优化。3.可靠的系统开发生命周期,包括可靠和弹性系统的协同设计,高覆盖率的测试和验证策略,以及可靠性和弹性生命周期管理。这项平台资助计划的增值方面包括:(a)确保在关键领域有足够数量的研究人员,(B)探索重要的战略领域,(c)促进研究基础设施,(d)吸引新的人才,(e)开拓和加强国际合作;(f)加速技术转让。
项目成果
期刊论文数量(10)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Scalable Uncertainty for Computer Vision With Functional Variational Inference
- DOI:10.1109/cvpr42600.2020.01202
- 发表时间:2020-03
- 期刊:
- 影响因子:0
- 作者:Eduardo D C Carvalho;R. Clark;Andrea Nicastro;P. Kelly
- 通讯作者:Eduardo D C Carvalho;R. Clark;Andrea Nicastro;P. Kelly
Algebraic description and automatic generation of multigrid methods in SPIRAL
SPIRAL中多重网格方法的代数描述和自动生成
- DOI:10.1002/cpe.4105
- 发表时间:2017
- 期刊:
- 影响因子:0
- 作者:Bolten M
- 通讯作者:Bolten M
A fully-customized dataflow engine for 3D earthquake simulation with a complex topography
用于复杂地形 3D 地震模拟的完全定制数据流引擎
- DOI:10.1007/s11432-020-2976-5
- 发表时间:2021-11
- 期刊:
- 影响因子:0
- 作者:Bingwei Chen;Haohuan Fu;Wayne Luk;Guangwen Yang
- 通讯作者:Guangwen Yang
A High Throughput Polynomial and Rational Function Approximations Evaluator
高吞吐量多项式和有理函数近似评估器
- DOI:10.1109/arith.2018.8464778
- 发表时间:2018
- 期刊:
- 影响因子:0
- 作者:Brisebarre N
- 通讯作者:Brisebarre N
Combining Dynamic & Static Scheduling in High-level Synthesis
结合动态
- DOI:10.1145/3373087.3375297
- 发表时间:2020
- 期刊:
- 影响因子:0
- 作者:Cheng J
- 通讯作者:Cheng J
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Wayne Luk其他文献
Working Group : Relationships between BX and View Updates
工作组:BX 和视图更新之间的关系
- DOI:
- 发表时间:
2011 - 期刊:
- 影响因子:0
- 作者:
Yoshiki Yamaguchi;Tsoi Hung;Wayne Luk;新井宏明;Takahiro Hirofuchi;Soichiro Hidaka - 通讯作者:
Soichiro Hidaka
FPGA-based Streaming Computation for Lattice Boltzmann Method
基于 FPGA 的格子玻尔兹曼法流计算
- DOI:
- 发表时间:
2007 - 期刊:
- 影响因子:0
- 作者:
Kentaro Sano;Oliver Pell;Wayne Luk;Satoru Yamamoto - 通讯作者:
Satoru Yamamoto
Hardware Acceleration for Accurate Stereo Vision System using Mini-Census Adaptive Support Region
使用小型人口普查自适应支持区域的精确立体视觉系统的硬件加速
- DOI:
- 发表时间:
2013 - 期刊:
- 影响因子:2
- 作者:
Yi Shan;Yuchen Hao;Wenqiang Wang;Yu Wang;Wayne Luk;Xu Chen;Huazhong Yang - 通讯作者:
Huazhong Yang
Guest Editorial: 20 Years of ASAP
- DOI:
10.1007/s11265-008-0260-0 - 发表时间:
2008-09-04 - 期刊:
- 影响因子:1.800
- 作者:
Wayne Luk;Yvon Savaria;Oskar Mencer - 通讯作者:
Oskar Mencer
Sampling from the Multivariate Gaussian Distribution using Reconfigurable Hardware
使用可重构硬件从多元高斯分布中采样
- DOI:
10.1109/fccm.2007.55 - 发表时间:
2007 - 期刊:
- 影响因子:0
- 作者:
David B. Thomas;Wayne Luk - 通讯作者:
Wayne Luk
Wayne Luk的其他文献
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{{ truncateString('Wayne Luk', 18)}}的其他基金
DART: Design Accelerators by Regulating Transformations
DART:通过调节转换来设计加速器
- 批准号:
EP/V028251/1 - 财政年份:2021
- 资助金额:
$ 160.98万 - 项目类别:
Research Grant
Custom Computing for Advanced Digital Systems
高级数字系统的定制计算
- 批准号:
EP/I012036/1 - 财政年份:2010
- 资助金额:
$ 160.98万 - 项目类别:
Research Grant
Reconfigurable Architectures for Floating Point Applications
浮点应用的可重构架构
- 批准号:
EP/D060567/1 - 财政年份:2006
- 资助金额:
$ 160.98万 - 项目类别:
Research Grant
Optimising Hardware Acceleration for Financial Computation
优化金融计算的硬件加速
- 批准号:
EP/D062322/1 - 财政年份:2006
- 资助金额:
$ 160.98万 - 项目类别:
Research Grant
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