Conduit Diffusion in Silicon on Silicide on Insulator substrates

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Silicon on Insulator (SOI) technology is now of critical importance to future generations of integrated circuit chips. SOI offers potentially faster chip operation, simplified manufacturing technology and low power operation. It also offers the possibility of integrating entire electronic systems on a chip. Very novel variations on this relatively simple substrate are emerging. The Silicon on Silicide on Insulator (SSOI) substrate is one such substrate. This substrate includes a low resistivity layer (tungsten silicide) buried under the active silicon. Primary applications of this layer would be as ohmic contacts and for lateral current flow of current prior to return to surface contacts. ICs use buried ion implanted layers for this function but the silicide offers 2 orders of magnitude reduction in series resistance. Parasitic resistance in bipolar and power devices can therefore be substantially reduced by employing this substrate. The SSOI offers further potential advantage which has not yet been exploited. The buried silicide is polycrystalline in structure and diffusion of common dopants for silicon will therefore be by grain boundary diffusion which will be rapid. Low thermal budget treatment may be used to move these dopants relatively long distance without disturbance of other dopant profiles in the overlying silicon. Short time rapid thermal anneal can then be employed to out diffuse dopant from the silicide to produce ultra-shallow junctions in the silicon. This can all be achieved at the near back end of the device production ensuring tight control of all junction profiles, elimination of wide buried implanted layers and simplification in the manufacturing schedule. This technology will provide further opportunity for exciting new process and device architectures with advantage offered in unit cost and electronic device performance over the spectrum from ICs and microwave devices to power and smart power transistors. The focus of this contract is therefore to conduct a detailed scientific investigation of dopant diffusion in tungsten silicide. Sensitive electronic experimental structures will be employed which will allow accurate characterisation of dopant diffusion over distance. This is vitally important to provide the diffusivity data, segregation coefficients etc which will allow design of future processes and devices. Strategy for supply of dopant to the buried silicide layer must also be developed. For near back end of processing technology this will require variations on refilled trench technology. This project will seek to investigate this approach using a number of refill materials. The technology will lead to ultra low parasitic resistance. It is therefore proper to ensure that any trench refill technology may offer low additional resistance. Trench refill with tungsten will therefore be undertaken to provide an optimised substrate for power devices and linear ICs. The potential of the technology will be demonstrated with a relatively simple microwave diode. The diode will be manufactured on the SSOI substrate and will exhibit minimised parasitic capacitance and resistance. Exploitation of the substrate and the proposed technology can develop in new contracts or industrial collaborations during the time of the project to address smart power/ vertical power devices, linear IC technology and high frequency components.