Renaissance Germanium

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Germanium, in at the birth of the electronics revolution, is experiencing a renaissance as a semiconductor material - possibly even rivalling silicon, and is attracting huge interest as the silicon end-game hots up. It is perceived, audaciously but by many, as a potential candidate to maintain silicon-like technology and associated devices well beyond the envisaged end of silicon development (around 2020) and also take the technology into exciting new areas and performance regimes. This proposal sets out to explore some of the intriguing aspects and consequences of the fundamental electronic structure of Ge not previously examined. There are good theoretical arguments to suggest that some critical performance parameters can be dramatically enhanced if carriers travel in non-conventional crystallographic directions and when the germanium is under strain. We will investigate how these new environments affect the velocity/mobility and effective mass of the carriers (electrons and holes) and the processes that impede their motion (scattering).The project will be conducted by three UK university groups uniquely positioned to undertake this research and with international reputations for epitaxial growth of strained Ge (Warwick), transmission electron microscopy (TEM) for structural characterization on the nanoscale (Sheffield) and carrier transport modelling (Glasgow). The industrial standard CVD growth system at Warwick puts us in a unique position to contribute to this field of research, with good prospects of the high quality Ge structures being available early in the programme. Participation of IMEC, the leading European nano-processing laboratory, will give us unparalleled access to tools not available in the UK. Our intellectual property will be fully protected and could be exploited by numerous companies in the UK.The principal objective is to study 2D carrier transport in these largely untried orientations and to look for significant enhancements in carrier mobility compared to the conventional (100) orientation. Similar investigations are currently underway in silicon and it is opportune to now explore this in Ge. It is particularly timely in the light of IMEC's recent progress in Ge device fabrication using essentially silicon processing techniques.The programme consists of three integrated workpackages:WP1 - Growth and processing of strained Ge channel structures: Epitaxial processes will be developed, structural characterisation performed including high resolution TEM, and simple structures processed for electrical measurement.WP2 - Modulation doped buried channel structures: Initial assessment and screening of orientation and strain influences on hole and electron transport, quickly targeting optimised structures and specifically avoiding any perturbing effects of processing that may be detrimental to electron transport. Results from the measurements will be used by the Glasgow Device Modelling Group to develop/refine basic scattering and mobility models for this materials system and provide pointers to final choice of structures.WP3 - Surface-channel device structures: Structures containing a gate electrode to modulate the carrier population and make it an active device. The gate is separated from the channel by a very thin layer of a new (high-k) dielectric material, which will also scatter the carriers. Transport measurements down to very low temperatures will allow us to appraise the full device potential offered by Ge.By the end of the project we would expect to have a thorough understanding of the practical and theoretical aspects of 2D carrier transport in the full matrix of Ge surface orientations, channel directions and strain. Such knowledge can then be used to great advantage in helping realise new generations of highly performing devices that are needed in the nanoelectronics and the futuristic spintronics era.