Efficient hardware implementations of decimal floating-point arithmetic unit

十进制浮点运算单元的高效硬件实现

• 批准号: 262277-2007
• 负责人: Ko, SeokBum
• 金额: $ 1.09万
• 依托单位: University of Saskatchewan
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2009
• 资助国家: 加拿大
• 起止时间: 2009-01-01 至 2010-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=427012
• 关键词: Efficient; hardware; implementations; decimal; floating

Recently, there are significant demands for decimal arithmetic operations for many commercial applications, including financial analysis, tax calculation, phone billing, currency conversion, Internet based applications, and e-commerce. Consequently, specifications for decimal arithmetic operations have recently been added to the unapproved draft (as of Oct. 2006) of the Institute of Electrical and Electronics Engineers (IEEE) 754 Standard for Floating-Point Arithmetic. Binary floating-point arithmetic in hardware can handle decimal arithmetic-intensive applications, but decimal data can be more accurately represented by a decimal arithmetic unit. Since many decimal numbers cannot be exactly represented in binary, it is desirable to store data in a decimal format and process data using decimal arithmetic software. Even if decimal floating-point arithmetic software eliminates conversion errors, it is known that decimal floating-point software is typically 100 to 1,000 times slower than binary floating-point implemented in hardware. Therefore, there is need for hardware implementations of decimal floating-point arithmetic. Efficient hardware implementations of decimal floating-point arithmetic unit will be studied in this proposed research. The result of this research will improve the performance and the accuracy of many commercial applications significantly.

最近，许多商业应用对十进制算术运算有很大的需求，包括财务分析、税务计算、电话计费、货币换算、基于互联网的应用和电子商务。因此，十进制算术运算的规范最近已添加到电气和电子工程师协会 (IEEE) 754 浮点算术标准的未经批准的草案（截至 2006 年 10 月）中。硬件中的二进制浮点运算可以处理十进制运算密集型应用，但十进制数据可以通过十进制运算单元更准确地表示。由于许多十进制数无法用二进制精确表示，因此希望以十进制格式存储数据并使用十进制算术软件处理数据。即使十进制浮点算术软件消除了转换错误，众所周知，十进制浮点软件通常比硬件中实现的二进制浮点慢 100 到 1,000 倍。因此，需要十进制浮点运算的硬件实现。本研究将研究十进制浮点运算单元的高效硬件实现。这项研究的结果将显着提高许多商业应用的性能和准确性。