2-D Crystal Electronics for Energy-Efficient Terabit Communication Links

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By 2007, before the iPhone and the iPad were introduced, the US ICT industry already had a larger carbon footprint than the airline industry. Since then, the proliferation of wireless communication devices, of social media (Faceboook, Twitter, Linkedin, etc.) and cloud computing has only exacerbated the annual growth rate of energy consumption attributed to the ICT industry. We now have 2049 data centers worldwide which consume 30 billion Watts, the equivalent of 30 nuclear power stations. On a per capita basis, Canadians rank ahead of Americans in terms of Internet usage and enrollment in social media websites. Our appetite for wireless communication seems insatiable. Unfortunately, of all communication links, wireless is the least efficient. The outlook is just as bleak for computation. Lack of transistor subthreshold slope improvement and lack of appropriate supply voltage scaling during the last 12 years has meant that microprocessors have become power-density limited. While parallel and multicore microprocessor architectures have temporarily alleviated the problem at the expense of increased communication across the chip and stalled clock frequency, only by inventing new transistors with steeper subthreshold slopes, faster transport, and higher current driving capability, which will permit operation from 0.3 to 0.1 V supplies, will the power density trend be curbed or reversed.