Evaluating low power techniques for backscatter WiFi nodes

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Wavelite technology is built upon the concept of backscatter communications, where wireless WiFi signals**emitted from a source can be reflected back by a Radio-frequency identification (RFID) like device. This**allows Internet of Things (IoT) devices to be very cost effective and widely deployable since it can benefit from**the already deployed WiFi infrastructure. To engage in a transmission the IoT node has first to sense the**presence of WiFi excitation signal and then it wakes up the modulation subsystem to transmit data. A key**component of backscattering IoT device is a wake-up receiver (WuR) that continuously monitors the power of**the WiFi signals and triggers a wakeup signal to the Wavelite transmitter.Driven by the fact that advanced IoT**devices have severe power constraints and life duration, the WuR has to consume power of less than hundred**micro-Watts. Also WuR has to have a high sensitivity to detect weaker signals, and increase the transmission**range. In addition a very compact form factor and low cost are important features in Wavelite products. Due to**the pressure of lower power and cost, a higher level of integration using CMOS (complementary**metal-oxide-semiconductor) technologies is needed. Due to the complexity of implementing wake up receiver**in CMOS technology, Wavelite needs assistance to study and develop this ultra-low power, high sensitivity**wake up receiver for their future IoT products.**The objective of this research project is to study and design of a new WuR architecture with ultra-low power**consumption (<100 micro-Watts) and high sensitivity (<-80dBm) for WiFi backscattering IoT applications.**These objectives include researching the existent available WuR architectures suitable for WiFi backscattering**IoT devices and deliver a comprehensive study on the best architecture that complies with Wavelite's**specifications. Propose and design, at circuit and layout levels using CMOS technology, a new fully integrated**WuR architecture to reduce power, cost and form factor.