CMOS Process Sensors and Design Methodology in Advanced Technology Nodes

先进技术节点中的 CMOS 工艺传感器和设计方法

• 批准号: 543852-2019
• 负责人: Ng, WaiTung
• 金额: $ 8.41万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Collaborative Research and Development Grants
• 财政年份: 2020
• 资助国家: 加拿大
• 起止时间: 2020-01-01 至 2021-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=699101
• 关键词: CMOS; Process; Sensors; Design; Methodology

FinFETs (Fin Field Effect Transistors) are the most advanced VLSI fabrication technology currently available. They are designed to extend the performance of CMOS technology beyond the Moore's law. The current VLSI product cycles are far shorter than the roll out of new generations of fabrication processes. FinFET circuit designers often have to start conceiving and designing new products before all the information in the process design kit (PDK) from the silicon foundry is ready. As a result, designers often have to perform a semi-blinded design, with the anticipation that the fabricated FinFET based VLSI prototypes will conform to the simulated performance. In this collaborative project with HiSilicon (a subsidiary of Huawei Canada), we will develop design techniques to enhance the chance of first time success for highly complex VLSI chips with billions of transistors and 100's man-year of development time/cost. We intend to fabricate VLSI prototypes on pre-released version of 7 nm FinFET technology (and later 5 nm) from Taiwan Semiconductor Manufacturing Company Limited (TSMC, the world's largest silicon foundry) for wireless telecommunication applications. In particular, this project has two main objectives. The first one is to improve the monitoring of the electrical characteristics of the FinFETs and peripheral components (e.g. capacitors, resistors, metal contacts, and metal interconnects, etc.) at on-chip level. The second objective is to develop process-tolerant circuit design techniques that can be self-adapted to any slight changes in device characteristics due to process variations and aging. Canada is the only G8 nations that does not have any mega-fab facility. However, we continue to be a world leader in nurturing fabless VLSI design houses, providing leading edge designs for global needs. The training of highly qualified personnel (HQP) with advanced VLSI design skills is essential to support the expanding electronics, communication and automotive industries in Canada.

FinFET(鳍场效应晶体管)是目前可用的最先进的VLSI制造技术。它们旨在将cmos技术的性能扩展到摩尔定律之外。目前的VLSI产品周期远远短于新一代制造工艺的推出。FinFET电路设计人员通常必须在硅铸造厂的工艺设计工具包(PDK)中的所有信息准备就绪之前开始构思和设计新产品。因此，设计者经常不得不进行半盲设计，以期望所制造的基于FinFET的VLSI原型将符合模拟性能。 在这个与华为加拿大子公司HiSilicon的合作项目中，我们将开发设计技术，以提高具有数十亿个晶体管和100‘S工年开发时间/成本的高复杂VLSI芯片的首次成功机会。我们打算利用台湾半导体制造有限公司(全球最大的硅代工企业台积电)预发布的7 nm FinFET技术(以及后来的5 nm)制造用于无线电信应用的VLSI原型。 特别是，这个项目有两个主要目标。第一项是改善对FinFET和外围组件(例如电容器、电阻器、金属触点和金属互连等)的电气特性的监测。在芯片级别。第二个目标是开发工艺容错电路设计技术，这种技术可以自适应于由于工艺变化和老化而导致的器件特性的任何轻微变化。 加拿大是八国集团中唯一没有大型工厂的国家。然而，在培育无晶圆厂超大规模集成电路设计公司方面，我们继续保持世界领先地位，为全球需求提供领先的设计。培训具有先进VLSI设计技能的高素质人员(HQP)对于支持加拿大不断扩大的电子、通信和汽车行业至关重要。