CMOS Process Sensors and Design Methodology in Advanced Technology Nodes

FinFET（鳍式场效应晶体管）是目前最先进的VLSI制造技术。它们旨在将CMOS技术的性能扩展到摩尔定律之外。目前的VLSI产品周期远远短于新一代制造工艺的推出。FinFET电路设计人员通常必须在硅代工厂的工艺设计工具包（PDK）中的所有信息准备就绪之前开始构思和设计新产品。因此，设计者通常不得不执行半盲设计，期望所制造的基于FinFET的VLSI原型将符合模拟性能。 在这个与海思（华为加拿大子公司）的合作项目中，我们将开发设计技术，以提高具有数十亿个晶体管和100人年开发时间/成本的高度复杂的VLSI芯片首次成功的机会。我们打算在台湾积体电路制造有限公司（台积电，世界上最大的硅代工厂）的7纳米FinFET技术（后来的5纳米）的预发布版本上制造VLSI原型，用于无线电信应用。特别是，该项目有两个主要目标。第一个是改进FinFET和外围组件（例如电容器、电阻器、金属触点和金属互连等）的电特性的监测。在芯片级。第二个目标是开发工艺容限电路设计技术，这种技术可以自适应于由于工艺变化和老化而导致的器件特性的任何微小变化。加拿大是八国集团中唯一没有任何巨型工厂设施的国家。然而，我们仍然是培育无晶圆厂超大规模集成电路设计公司的世界领导者，为全球需求提供领先的设计。培训具有先进VLSI设计技能的高素质人才（HQP）对于支持加拿大不断扩大的电子，通信和汽车行业至关重要。

FinFETs (Fin Field Effect Transistors) are the most advanced VLSI fabrication technology currently available. They are designed to extend the performance of CMOS technology beyond the Moore's law. The current VLSI product cycles are far shorter than the roll out of new generations of fabrication processes. FinFET circuit designers often have to start conceiving and designing new products before all the information in the process design kit (PDK) from the silicon foundry is ready. As a result, designers often have to perform a semi-blinded design, with the anticipation that the fabricated FinFET based VLSI prototypes will conform to the simulated performance. In this collaborative project with HiSilicon (a subsidiary of Huawei Canada), we will develop design techniques to enhance the chance of first time success for highly complex VLSI chips with billions of transistors and 100's man-year of development time/cost. We intend to fabricate VLSI prototypes on pre-released version of 7 nm FinFET technology (and later 5 nm) from Taiwan Semiconductor Manufacturing Company Limited (TSMC, the world's largest silicon foundry) for wireless telecommunication applications. In particular, this project has two main objectives. The first one is to improve the monitoring of the electrical characteristics of the FinFETs and peripheral components (e.g. capacitors, resistors, metal contacts, and metal interconnects, etc.) at on-chip level. The second objective is to develop process-tolerant circuit design techniques that can be self-adapted to any slight changes in device characteristics due to process variations and aging.Canada is the only G8 nations that does not have any mega-fab facility. However, we continue to be a world leader in nurturing fabless VLSI design houses, providing leading edge designs for global needs. The training of highly qualified personnel (HQP) with advanced VLSI design skills is essential to support the expanding electronics, communication and automotive industries in Canada.