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Electronic Conduction in Submicron Field-Effect Transistors

Electronic Conduction in Submicron Field-Effect Transistors
亚微米场效应晶体管中的电子传导
批准号:
8503443
负责人:
Marc Kastner
金额:
$55.9万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1985
资助国家:
美国
项目状态:
已结题
起止时间:
1985-09-01 至 1989-02-28

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中文摘要
翻译
最近的研究结果表明,金属绝缘体硅场效应晶体管(MOSFET)可以被制作得足够窄,从而使其中的电子传导过程发生根本的变化。在低温下,当栅极上的电压变化时,观察到电导的大的、非单峰的变化。对具有70 nm宽反型层的器件的最新结果表明,电流受电子隧穿MOSFET反型层中的局域态的限制。这显然是由于氧化物表面的离子或栅线宽度的变化产生的随机电势造成的。这代表了一种不寻常的情况,在这种情况下,电流受到仅通过一个电子态的电子跃迁的限制。人们正在开发新的制备方法,以减少由于氧化物表面的杂质和氧化物中的局域电子态造成的无序,并使栅线更窄和更均匀。器件正在麻省理工学院亚微米结构实验室制造,并在2℃以上进行表征;麻省理工学院的SOK。
英文摘要
Recent results have demonstrated that metal-insulator-Si-field-effect transistors (MOSFET's) can be made narrow enough that the electronic conduction process in them changes in a fundamental way. At low temperature, large, nonmonotomic variations of the conductance are observed when the voltage on the gate is varied. Recent results on devices with 70nm wide inversion layers indicate that the current is limited by electron tunneling through localized states in the inversion layer of the MOSFET. These are apparently caused by the random potential resulting from ions on the surface of the oxide or variations in the width of the gate wire. This represents an unusual situation in which the current is limited by electronic transitions through just one electronic state. New fabrication methods are being developed with the goals of reducing the disorder caused by impurities on the oxide surface and localized electronic states in the oxide, and making the gate wires narrower and more uniform. Devices are being fabricated in the MIT Submicron Structures Laboratory, and they are being characterized at temperatures above 2;soK at MIT.
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