The Design of Secondary Caches

以前很少使用的缓存层次结构在将来会变得很普遍 共享内存计算机，因为：（1）处理器正在加速 相对于主存储器，（2）片上高速缓存是有用的，但不是很大 足以满足对片外缓存的需求，以及（3）专门化 高速缓存，以减少互连带宽是重要的共享- 内存多处理器。二级缓存，这些缓存不相邻 处理器，需要研究，因为它们在不同的系统中运行 上下文比一级缓存（那些邻近处理器）。 几 研究人员对二级缓存进行了检查。 例如，二级缓存， 只需要进行块传输，而不是在每个周期都引用， 做一级缓存 这些和其他的区别 二级和一级缓存的操作要求应导致 到显著不同的实现。 研究了二级缓存组织的几个方面，包括： (1)实现集合结合性的新方法，（2）如何缓存 一致性失效影响可选的高速缓存组织，以及（3）当 标签或数据存储器应该用动态RAM来实现。 的方法 所用的是分析建模、跟踪驱动的模拟和试验 实现方式的

Cache hierarchies, heretofore rarely used, will become common in future shared-memory computers because: (1) processors are speeding up relative to main memories, (2) on-chip caches are useful but not large enough to obviate the need for off-chip caches and (3) specializing caches to reduce interconnection bandwidth is important to shared- memory multiprocessors. Secondary caches, those caches not adjacent to processors, need to be studied since they operate in a different system context than level one caches (those adjacent to processors). Few studies have examined secondary caches. Secondary caches, for example, need only do block transfers and are not referenced on every cycle as do level one caches. These and other differences between the operational requirements of secondary and level one caches should lead to significantly different implementations. Several aspects of secondary cache organization are examined including: (1) new methods for implementing set-associativity, (2) how cache coherency invalidates affect optional cache organization, and (3) when tag or data memory should be implemented with dynamic RAM. The methods used are analytic modeling, trace-driven simulation and trial implementations.