SHF: Small: Managing Non-Determinism in Multithreaded Software and Hardware
SHF: Small: Managing Non-Determinism in Multithreaded Software and Hardware
批准号:
0916725
负责人:
Mark Hill
金额:
$50.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-08-01 至 2013-07-31
中文摘要
“该奖项是根据2009年美国复苏和再投资法案(公法111 - 5)资助的。"在21世纪世纪,占主导地位的计算平台已经转向多核芯片,这些芯片实现缓存一致性共享内存并运行多线程应用程序。不幸的是,这些芯片不提供一个确定性的模型,无论是软件或硬件开发人员。对多个可能的执行进行推理和测试比对单个正确的顺序执行进行推理和测试要困难得多,这在世纪占主导地位的冯·诺依曼模型下是可能的。减轻编程多核芯片的负担对于为社会提供我们所期望的快速、经济高效的性能提升至关重要。此外,广泛的影响需要实际的解决方案,不要求行业放弃或重写现有的通用线程为基础的software.For这一目的,根据这项建议的研究将开发管理非确定性的解决方案,提供互补的好处和机会的替代实现方法。(1)工作将扩大技术的记录执行确定性重放,以提高重放并行性和扩展范围的记录/重放硬件调试和容错。(2)工作将开发和推进一个确定性的一致性模型,消除了共享内存多处理器系统中的非确定性的主要来源:内存竞争。(3)工作将开发确定性一致性的全软件和硬件加速实现,部分通过扩展威斯康星州GEMS模拟基础设施。(4)最后,工作将探讨重建一致性的正式确定性的基础上。更广泛的影响将包括在公共软件版本中体现拟议的工作(例如,GEMS)以及通过课程、讲座、行业分支机构和商业影响向学生传播。
英文摘要
"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."In the 21st century, the dominant computing platform has shifted to multicore chips that implement cache-coherent shared memory and run multi-threaded applications. Unfortunately, these chips do not provide a deterministic model to either software or hardware developers. Reasoning about and testing for multiple possible executions is much harder than reasoning about and testing for a single correct sequential execution, as was possible under the von Neumann model that dominated in the 20th century. Easing the burden of programming multicore chips is critical to provide society with the rapid, cost-effective performance gains that we have all come to expect. Moreover, broad impact requires practical solutions that do not ask industry to discard or rewrite billions of lines of existing general-purpose thread-based software.To this end, research under this proposal will develop solutions for managing non-determinism with alterative implementation approaches that provide complementary benefits and opportunities. (1) Work will expand techniques of recording executions for deterministic replay to improve replay parallelism and extend the scope of record/replay to hardware debugging and fault-tolerance. (2) Work will develop and advance a deterministic coherence model that eliminates a major source of non-determinism in shared-memory multiprocessor systems: memory races. (3) Work will develop both all-software and hardware-accelerated implementations of deterministic coherence, in part, through extensions to the Wisconsin GEMS simulation infrastructure. (4) Finally, work will explore rebuilding coherence upon a formal deterministic foundation. Broader impacts will include embodying the proposed work in public software releases (e.g., GEMS) as well as dissemination to students and through courses, talks, industrial affiliates, and commercial influence.
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