CRI: A MASSIV Cluster for Designing Chip Multiprocessors

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Review AnalysisProgram: NSF 04-588 CISE Computing Research InfrastructureTitle: CRI A MASSIV Cluster for Designing Chip Multiprocessors Proposal: CNS 0551401PI: Hill, Mark D.Institution: University of Wisconsin-Madison Researchers at the University of Wisconsin, Madison will acquire a computing cluster infrastructure, distinguished by large memory and storage capacity, that will facilitate research on designs for multiple processors on a single. The compute cluster will enable the group to research innovative new designs through simulation and evaluation of designs that are tested against large, future workloads. Research will look at innovations such as log-based transactional memory to ease multithreaded programming, using hardware to aid multithreaded debugging, leveraging token coherence for aggressive CMP memory hierarchies, using compression to enlarge on-CMP caches and reduce off-CMP bandwidth requirements, exploiting on-CMP transmission lines for novel cache architectures, facilitating speculative parallelization and multithreading, handling increasing memory latencies, parallelizing the execution of system-intensive workloads on novel CMP micro-architectures, minimizing the performance impacts of robust, reliable software, and exploring new ways such as coherence decoupling to address cache coherence. Broader impacts of this project include training, industry partnerships, and sharing the evaluation infrastructure and simulated workloads with other research groups.