Presidential Young Investigator Award: Cache Memory Design

这项研究的长期重点是多处理器的性能评估和实现，这些多处理器易于编程，提供数量级的计算能力，并且可以有效地实现成本效益。这项工作的主要重点是缓存存储器的设计，具体任务是开发多处理器编译器，地址转换的实现和语义，在具有多个缓存的系统中实现连贯共享存储器，缓存设计和实现因素之间的相互作用，以及缓存层次结构的未来有效性。在此期间的研究重点是完成合作共享内存的研究，继续威斯康星风洞的工作，以及研究操作系统修改以利用可变页面大小的优势。

Hill The long range focus of this research is on the performance evaluation and implementation of multiprocessors that are easy to program, provide orders of magnitude more computing power, and can be implemented cost effectively. The principal thrust of this work is on the design of cache memories, with specific tasks on the development of multiprocessor compilers, the implementation and semantics of address translation, the implementation of coherent shared memory in systems with multiple caches, the interaction between cache design and implementation factors, and the future effectiveness of cache hierarchies. The focus of the research during this period is on the completion of the study of cooperative shared memory, the continuation of the work on the Wisconsin Wind Tunnel, and the study of operating system modifications to take advantage of variable page sizes.