RIA: New Approaches to Partitioning for Large-Scale VLSI Systems

研究的重点是系统的高层设计，重点是功能模块之间的逻辑划分。研究了性能驱动布局的三种新的问题形式和算法。这些是：(1)寻找具有多路逻辑分区扩展的逻辑双分区稀疏切割的数值方法；(2)大规模划分问题的快速最优解估计技术。这些方法基于随机漫步和模拟退火理论，并对平面综合的模块面积估计进行了扩展；(3)性能驱动划分问题的理论基础（加权模块打包）。可以证明的是，这个问题的好算法正在研究中。

The research is on high-level system design, with a focus on partitioning logic among functional modules. Three new problem formulations and algorithms for performance driven layout are being investigated. These are: (1) numerical methods for finding sparse cuts for logic bi-partitioning with extensions to multi-way logic partitions; (2) techniques for estimating rapidly optimal solution values in large scale partition problems. These methods are based on random walks and the theory of simulated annealing, and have extensions to module area estimation for floorplan synthesis; and (3) a theoretical foundation (weighted module packing) for the performance-driven partitioning problem. Provably good algorithms for this problem are being examined.