CISE Educational Infrastructure: "Modern Processor Design: A New Computer Engineering Course"

该奖项是对现代处理器设计课程的开发，该课程将侧重于单芯片处理器中的指令级并行(ILP)处理，并将包括超流水线和超标量处理器设计技术，ILP型处理器的指令调度技术，以及指令级性能评估和表征。本课程将介绍一种新的处理器设计方法，包括对特定设计特性的性能影响进行实验和定量分析。沈博士将撰写一本教科书和一套课堂讲稿，分发给其他机构。这一奖项是为了表彰现代处理器设计高级计算机工程课程的开发。本课程将讨论与利用指令级并行性的当前和未来一代处理器的设计相关的当代处理器设计技术。例子包括超流水线、超标量、超对称和超长指令字(VLIW)处理器。作为该项目的一部分，将分发一本教科书和一套课堂讲稿。

This award is for the development of a course on modern processor design that will focus on instruction level parallel (ILP) processing in single chip processors and will include techniques for superpipelined and superscalar processor design, instruction scheduling techniques for ILP type processor, and instruction-level performance evaluation and characterization. A new processor design methodology involving experimentation and quantitative analysis of the performance impact of specific design features will be presented in the course. Dr. Shen will be writing a textbook as well as a set of lecture notes for distribution to other institutions. This award is for the development of a senior-level computer engineering course on modern processor design. The course will address contemporary processor design techniques relevant to the design of current and future generation processors that exploit instruction level parallelisms. Examples include superpipelined, superscalar, supersymmetry and Very Long Instruction Word (VLIW) processors. A textbook and a set of lecture notes will be disseminated as part of this project.