Hardware Generation of Threads in a Multithreading Processor

同步多线程（SMT）处理器依靠线程级并行性（运行多个作业）来超越单线程处理器的性能。然而，单线程性能对主流处理器来说仍然很重要。当系统中只有一个或几个进程时，硬件可以使用空闲资源创建线程，从而增加SMT处理器可用的ILP。该项目正在开发硬件线程生成技术，以提高SMT性能在缺乏软件生成的线程级并行性。正在研究的技术包括多路径执行、指令回收和推测循环执行。线程多路径执行（TME）利用空闲硬件上下文来解决分支问题，通过单个应用程序中的条件分支推测地执行多条路径。指令回收提高了多路径执行的效率，因为它避免了重新获取不依赖于分支的路径指令，并避免了重新执行不依赖于分支的数据指令。推测循环并行利用编译器分析和循环和归纳语句的动态硬件检测，推测地并行执行多个未来循环迭代。

Simultaneous Multithreaded (SMT) processors depend on thread- level parallelism (multiple jobs to run) to surpass the performance of single-threaded processors. However, single- thread performance is still important for mainstream processors. When there are only one or a few processes in the system, hardware can create threads that increase the ILP available to the SMT processor, using otherwise idle resources. This project is developing hardware thread- generation techniques to increase SMT performance in the absence of software-generated thread-level parallelism. The techniques being investigating include multiple path execution, instruction recycling, and speculative loop execution. Threaded Multiple-path Execution (TME) takes advantage of idle hardware contexts to solve the branch problem, speculatively executing multiple paths through conditional branches in a single application. Instruction Recycling increases the efficiency of multiple-path execution, as it avoids refetching instructions which are not path-dependent on a branch, and avoids re-executing instructions that are not data-dependent on the branch. Speculative Loop Parallelism speculatively executes multiple future loop iterations in parallel, using compiler analysis and dynamic hardware detection of loops and induction statements.