High-Performance Switch Architectures for CC-NUMA Servers

高速缓存一致性非一致内存访问(CC-NUMA)体系结构正迅速成为可扩展多处理器设计的标准。这种体系结构的主要问题在于较长的远程内存访问时间。本项目致力于为CC-NUMA机器设计新颖的交换结构，以缓解存储延迟问题。正在开发基于动态分配的组合缓冲器和具有虚拟通道的虫洞路由的定制交换机设计。交换仲裁器被重新设计为在共享存储器环境中适用时为不同类型的消息提供不同的优先级。正在开发一种新的交换机高速缓存体系结构，其将缓冲器用作交换机内的高速缓存以支持处理器之间的数据共享、作为预取或牺牲缓冲器以及作为分布式目录以维护高速缓存一致性。对处理器和内存管理的硬件和软件支持也在调查中。研究共享内存应用程序的行为是该项目不可或缺的一部分。新的设计被整合到一个执行驱动的模拟器中，并正在测量各种科学和商业应用程序的性能改进。

The Cache-Coherent Non-Uniform Memory Access (CC-NUMA) architectures are rapidly becoming a standard for scalable multiprocessor design. The main problem with such architectures lies in the large remote memory access time. This project deals with designing novel switch architectures for the CC-NUMA machines to alleviate the memory latency problem. Custom switch designs are being developed based on dynamically allocated combined buffer and wormhole routing with virtual channels. The switch arbiter is redesigned to provide different priorities for different type of messages as applicable in a shared memory environment. A new switch cache architecture is being developed which uses the buffers as a cache inside the switch to support data sharing between the processors, as a prefetch or victim buffer, and as distributed directories to maintain cache coherence. Hardware and software support for processor and memory management is also being investigated. Study of the behavior of shared memory applications forms an integral part of the project. The new designs are incorporated in to an execution-driven simulator and the performance improvement of various scientific and commercial applications is being measured.