Industry/University Cooperative Research Center Renewal: Center for Design of Analog-Digital Integrated Ciruits

根据美国国家科学基金会公告97-164，该奖项资助多所大学工业/大学合作研究中心（I/UCRC）模拟/数字集成电路设计的第二个五年。领头的大学是华盛顿州立大学，它的研究伙伴是华盛顿大学和俄勒冈州立大学，在纽约州立大学石溪分校也有附属研究机构。该中心符合I/UCRC项目要求。中心的研究议程包括：1)一维分布元素的紧凑建模[j]。高速A/D转换在通信中的应用，3)4.低频噪声过采样A/D转换器的低灵敏度高阶调制器，5。从基于物理的器件模型发展射频等效电路模型，6)低相位噪声亚微米CMOS压控振荡器的设计[j]。CMOS RF功率晶体管的建模与仿真；基于标准亚微米CMOS工艺的高压CMOS晶体管设计方法[j]。超高速电路合成与布局，2010。深亚微米模拟布局自动化的性能和可制造性，11)2.4和5.8 GH3收发器中模拟失真的自适应DSP补偿[j]。数字CMOS技术中的开关电容电路，2013。片上互连模型的高频/高速集成电路和14。焦平面A/D转换的自适应技术。

ABSTRACTEEC-9908204RINGOThis award funds the second five years of the multi-university Industry/University Cooperative Research Center (I/UCRC) for Design of Analog/Digital Integrated Circuits in accordance with NSF Announcement 97-164. The lead university is Washington State University, with research partners at the University of Washington and Oregon State University and an affiliate research sites at the State University of New York at Stoney Brook. The Center meets the I/UCRC Program requirements.The research agenda for the Center addresses 1.) Compact Modeling of One-Dimensional Distributed Elements, 2.) High Speed A/D Conversion for Communication Applications, 3.) Low Frequency Noise, 4.) Low Sensitivity High Order Modulators for Oversampling A/D Converters, 5.) Development of RF Equivalent Circuit Models from Physics-Based Device Model, 6.) Design of Low Phase Noise Sub-micron CMOS VCOs, 7.) CMOS RF Power Transistor Modeling and Simulation, 8.) Methodology for Design of High-Voltage CMOS Transistors in Standard Sub-Micron CMOS Process, 9.) Ultra-High Speed Circuit Synthesis and Layout, 10.) Deep-Submicron Analog Layout Automation for Performance and Manufacturability, 11.) Adapative DSP Compensation for Analog Distortions in 2.4 and 5.8 GH3 Transreceivers, 12.) Switched-Capacitor Circuits in Digital CMOS Technology, 13.) On-Chip Interconnect Models for High Frequency/Speed Integrated Circuits and 14.) An Adaptive Technique for A/D Conversion on Focal Plans.