Signal Processing Enhanced DACs for Wideband Communication Systems

摩尔定律的延续使日益复杂的数字信号处理成为可能，使通信系统技术朝着增加带宽和降低单位成本的方向不断进步。然而，基于数字信号处理的通信系统不可避免地需要某些高性能的模拟电路模块，并且随着通信标准的不断发展，这些模块所需的精度将会增加。不幸的是，在延续摩尔定律集成电路(IC)技术时，必须权衡数字电路而不是模拟电路；随着IC技术的发展，实现高性能模拟电路的难度越来越大。因此，目前和未来高性能通信的需求与半导体电子行业的发展之间存在着根本的脱节。本研究通过开发数字信号处理增强技术来解决这个问题的一个重要方面，该技术能够实现高分辨率、高带宽的数模转换器(DAC)，这些DAC是宽带通信发射机中的关键部件。目前，此类DAC受到IC制造过程中不可避免地引入的元件失配以及其他引入非线性瞬时失真的非理想电路效应的限制。这项研究的目标是开发数字信号处理算法来缓解这些问题。这项研究由四个紧密耦合的部分组成：1)开发了一种超高效的动态元件匹配(DEM)技术，用于消除元件失配引起的谐波失真；2)开发了一种自适应噪声抵消技术，该技术增强了DEM以减少元件失配导致的SNR下降；3)开发了一种内插技术来缓解非线性暂态问题；以及4)开发了一种具有创纪录性能的CMOS集成电路原型，作为原理证明并提供了反馈以指导理论工作。

The relentless progress of communication system technology toward increased bandwidth and decreased unit cost has been enabled by increasingly sophisticated digital signal processing made possible by the perpetuation of Moore's Law. Nevertheless, communication systems based on digital signal processing inevitably require certain high-performance analog circuit blocks, and the accuracy required of these blocks will increase as communication standards continue to evolve. Unfortunately, in perpetuating Moore's Law integrated circuit (IC) technology trade-offs are necessary that favor digital circuitry over analog circuitry; high-performance analog circuits are increasingly difficult to implement as IC technology is scaled. Thus, there is a fundamental disconnect between the requirements of present and future high-performance communications and the evolution of the semiconductor electronics industry.This research addresses an important aspect of this problem by developing digital signal processing enhancement techniques that enable high-resolution, high-bandwidth digital-to-analog converters (DACs) which are critical components in wideband communication transmitters. Presently, such DACs are limited by component mismatches inevitably introduced during IC fabrication and by other non-ideal circuit effects that introduce nonlinear transient distortion. The goal of the research is to develop digital signal processing algorithms that mitigate these problems. The research consists of four tightly-coupled components: 1) the development of an ultra-efficient dynamic element matching (DEM) technique for eliminating harmonic distortion caused by component mismatches, 2) the development of an adaptive noise cancellation technique that augments the DEM to reduce SNR degradation caused by component mismatches, 3) the development of an interpolation technique to mitigate the nonlinear transient problem, and 4) the development of a CMOS integrated circuit prototype with record-setting performance as a proof-of-principle and to provide feedback with which to guide the theoretical work.