Collaborative Research: Hierarchical Testing and Yield Enhancement of High End Integrated RF Systems

0541005 Milor，LindaGeorgia Tech Research CorpCollaborative Research：高端集成RF系统的分层测试和成品率提高各种各样的应用，包括家用电子产品、个人设备、局域网、生物电子监测设备等，依靠无线通信。 无线通信增加的趋势迫使使用更高的频段（15- 60 GHz）来避免干扰。 虽然设计在15- 60 GHz频率范围内工作的系统非常具有挑战性，但对此类系统的测试更具挑战性，因为测试设备必须至少实现相同的性能。 其结果是，射频系统的测试成本往往超过项目成本的50%。 即使测试成本被吸收到产品成本中，两个趋势也需要一种全新的测试方法。 首先，系统成本的增加和系统性能损失的来源与封装相关。该行业正在探索使用涉及多个裸芯片的新封装方法。 这种封装方法的使用要求制造商基于晶片探针测试来保证芯片性能。 其次，逐渐缩短的产品周期需要基于晶圆探针数据的产量提高工作，以便将原型投入生产的过程不会超过市场窗口。 遗憾的是，由于高探头电容阻止了高频测量，目前无法在晶圆探针上测试RF元件。本项目通过开发用于晶圆探针的RF系统的测试设计和成品率提高设计的新方法来满足这些需求。 它将为这两项任务提供一个框架，通过片上传感结构和改进的基于环回的系统测试方法改进数据收集，并结合算法方法实现快速准确的故障隔离。

0541005Milor, LindaGeorgia Tech Research CorpCollaborative Research: Hierarchical Testing and Yield Enhancement of High End Integrated RF SystemsA wide variety of applications, including home electronics, personal devices, local area networks, bioelectronic monitoring devices, etc., rely on wireless communications. The trend for increased wireless communications forces the use of higher frequency bands (15-60GHz) to avoid interference. Although it is very challenging to design systems that operate in the 15-60GHz frequency range, testing of such systems is even more challenging, as the test equipment must at least achieve equal performance. The result is that the cost of test of RF systems often exceeds 50% of project cost. Even if the cost of testing is absorbed into product cost, two trends require a radically new approach to test. First, an increasing component of system cost and source of system performance loss is associated with packaging. The industry is exploring the use of new packaging methodologies involving multiple bare dies. The use of such packaging methodologies requires manufacturers to guarantee chip performance based on wafer probe tests. Second, progressively shorter product cycles require yield enhancement work based on wafer probe data, so that the process of bringing a prototype to production does not exceed the market window. Unfortunately, testing of RF components at wafer probe is currently not possible, due to the high probe capacitances that prevent high frequency measurements.This project addresses these needs by developing new approaches to design-for-test and design-for-yield-enhancement for RF systems for use at wafer probe. It will provide a framework for both of these tasks that enables improved data collection through on-chip sensing structures and improved loop-back-based system test methods, combined with algorithmic methods to enable fast and accurate fault isolation.