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Concurrent Error Detection in Analog Circuits

Concurrent Error Detection in Analog Circuits
模拟电路中的并发错误检测
批准号:
0702522
负责人:
Yiorgos Makris
金额:
$0.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-07-01 至 2010-06-30

项目摘要

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中文摘要
翻译
提案ID:0702522标题:模拟电路中的并发错误检测PI:Yiorgos Makris Inst:Yale UniversityAbstract现代混合信号集成电路中广泛的模拟和射频(RF)功能使其具有强大的新功能,特别是通过传感器和片上无线电与环境进行接口和通信。因此,混合信号集成电路现在是广泛的系统的一部分,其中许多被部署在关键任务应用(例如航空电子设备,医疗设备)或在危险环境中工作(例如空间,工业操作)。因此,这些系统的可靠性变得至关重要,需要先进的解决方案来监测其在现场运行期间的功能健康状况,并报告潜在的故障。虽然可靠性已经得到了广泛的研究,并且过去已经为数字电路开发了大量的并发错误检测(CED)方法,但是对于其模拟和RF对应物,仍然缺乏相关的解决方案。这个项目的目标就是填补这个空白。为此,其关键的新奇和独特性在于融合了VLSI设计和测试中最先进的实践,以及控制理论和模式识别的概念,以便为模拟和RF电路开发CED解决方案。简而言之,该项目将促进实现可靠的电子电路和系统,从而在广泛的应用中扩展其部署,实现可靠的计算,并促进技术可信度。拟议的研究是由教育和推广活动,提供研究生和本科生有机会参与跨学科的研究项目,并展示PI的承诺,作为一个研究人员,教育工作者和积极的社区成员的综合作用的补充。
英文摘要
Proposal ID: 0702522 Title: Concurrent Error Detection in Analog CircuitsPI: Yiorgos Makris Inst: Yale UniversityAbstract Incorporation of extensive analog and radio-frequency (RF) functionality on modern mixed-signal integrated circuits has armed them with powerful new capabilities, especially in interfacing and communicating with their environment through sensors and on-chip radios. As such, mixed-signal integrated circuits are now part of a broad spectrum of systems, many of which are deployed in mission-critical applications (e.g. avionics, medical equipment) or operate in hazardous environments (e.g. space, industrial operations). Consequently, the reliability of such systems becomes paramount, calling for advanced solutions to monitor their functional health during their operation in the field and to report potential malfunctions. While reliability has been extensively studied and a plethora of Concurrent Error Detection (CED) methods have been developed for digital circuits in the past, there is an alarming lack of pertinent solutions for their analog and RF counterparts. The objective of this project is to fill this void. To this end, its key novelty and uniqueness lies in the amalgamation of state-of-the-art practices in VLSI design and test, with concepts from control theory and pattern recognition, in order to develop CED solutions for analog and RF circuits. In short, this project will facilitate the realization of reliable electronic circuits and systems, thus extending their deployment in a broad range of applications, enabling reliable computing, and fostering technology trustworthiness. The proposed research is complemented by educational and outreach activities, which offer graduate and undergraduate students the opportunity to participate in inter-disciplinary research projects and demonstrate the PI's commitment to an integrated role as a researcher, educator, and active community member.
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CISE-ANR: SHF: Small: CHAMELEON: CompreHending And Mitigating Error in AnaLog ImplEmentations of On-Die Neural Networks
  • 批准号:
    2214934
  • 项目类别:
    Standard Grant
  • 资助金额:
    $62.38万
  • 财政年份:
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  • 负责人:
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SaTC: TTP: Medium: Hardware Intellectual Property Protection through Hybrid ASIC/TRAP Integrated Circuit Design
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  • 项目类别:
    Standard Grant
  • 资助金额:
    $90.0万
  • 财政年份:
    2022
  • 负责人:
    Yiorgos Makris
  • 依托单位:
Phase I IUCRC University of Texas at Dallas: Center for Hardware and Embedded System Security and Trust (CHEST)
  • 批准号:
    1916750
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $75.0万
  • 财政年份:
    2019
  • 负责人:
    Yiorgos Makris
  • 依托单位:
Planning IUCRC University of Texas at Dallas: Center for Hardware and Embedded System Security and Trust (CHEST)
  • 批准号:
    1747773
  • 项目类别:
    Standard Grant
  • 资助金额:
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  • 财政年份:
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  • 负责人:
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  • 依托单位:
国内基金
海外基金
基于Laplace Error惩罚函数的变量选择方法及其在全基因组关联分析中的应用
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    11001280
  • 项目类别:
    青年科学基金项目
  • 资助金额:
    17.0万元
  • 批准年份:
    2010
  • 负责人:
    王学钦
  • 依托单位: